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我在vivado调用VCS仿真,却一直报下面的error,有人知道是怎么回事吗?求帮忙解答一下,感谢! Chronologic VCS (TM) Version I-2014.03_Full64 -- Mon Nov 25 08:57:04 2019 Copyright (c) 1991-2014 bySynopsys Inc. ALL RIGHTS RESERVED This program is proprietary andconfidential information of Synopsys Inc. and may be used and disclosed only asauthorized in a license agreement controlling such use and disclosure. Error-[SETUP_MAX_INC_LEVEL] Max level ofinclude line exceeded Toomany levels(8) of includes in line 'OTHERS=/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/synopsys_sim.setup '.It should be less than 8. CPU time: .058 seconds to compile //=============================synopsys_sim.setup==================== 下面是对应文件的内容: OTHERS=/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/synopsys_sim.setup xil_defaultlib : vcs/xil_defaultlib fifo_generator_v13_0_1 :vcs/fifo_generator_v13_0_1 secureip :/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/secureip unisims_ver :/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/unisims_ver unimacro_ver :/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/unimacro_ver
unifast_ver :/home1/quyl/ddr3_2015_vcs_sim_an430_ov5642/ddr3_2015_vcs_sim_an430_ov5642.cache/compile_simlib/unifast_ver
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