模拟电路设计工程师（苏州工业园区）

helianalog

Job Responsibilities
1) Work with analog/digital ASIC design team for mixed signal new product development
2) Independent design of analog blocks such as BG, LDO, AMP, PLL, ADC, DAC ,OSC, power management etc
3) Guide layout engineer to optimize layout

Requirements:
1) MSEE/Bachelor with 2+ years of IC design experience
2) Familiar with full flow of analog IC design, which is from spec building, architecture simulation, circuit schematic, spice simulation and back-simulation, layout, drc/lvs/lpe check and tape-out
3) Good knowledge of layout, test engineering, lab test and product qualification
4) Experience in high accurate amplifier, OSC/BG or ADC is a plus
5) Good work attitude and learning capability

联系方式： 172493173（QQ）