Cadence User Conference 2017 PPT共享

renfulin · 发表于 2018-12-20 15:21:48

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本帖最后由 renfulin 于 2018-12-20 15:32 编辑

Cadence User Conference 2017Shanghai， China， August 22

总共有9大类主题：
Track 1. Digital Front-End and Signoff
Track 2. Digital Implementation
Track 3. PCB Design and Analysis
Track 4. IP Block Verification
Track 5. SoC System Verification
Track 6. Mixed-Signal Simulation and Characterization
Track 7. Custom Layout Implementation and Signoff
Track 8. Intelligent Voice and IoT Processor
Track 9. Computer Vision and Neural Network Processor

每个主题都有8、9个PPT演讲稿，全是Cadence客户的真实体验，值得分享出来，大家共同学习！
Trank1:

DF04 -Advanced Node SRAM Simulation and Characterization solution- Hisilicon - Tanfu Zhao - v2.pdf (1.55 MB, 下载次数: 39 )

DF01 - V2 - Technology Advancements in Design Creation - Cadence - Kam Kittrell.pdf (2.88 MB, 下载次数: 36 )

现场演讲版本 - Timing closure for TSMC 16FFC design with QRC AVMF techniqueV2.pdf (2.65 MB, 下载次数: 44 )

DF07 - Making ECOs fast and efficient with Conformal ECO - RDA Micro - Wenqing Ji.pdf (3.37 MB, 下载次数: 41 )