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IEEE paper
Abstract—Some recent PLL designs utilize a half-rate phase
detector so that the VCO operates at a frequency that is one-half
of the input data rate. In this paper, a technique is proposed to
extend the half-rate phase detector structure to a rate of ,
for integer
. The concept is explained using a rate 1/8
implementation and simulation results are presented to verify the
scheme. These rate phase detectors can be used to raise the
maximum operating frequency of clock and data recovery circuits
in a given CMOS process technology. |
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