Design on Mixed-Voltage IO Buffers with Hot-Carrier Reliability(SCI 2007)

semico_ljj · 发表于 2007-10-31 09:08:52

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Design on Mixed-Voltage I/O Buffers
with Consideration of Hot-Carrier Reliability

Ming-Dou Ker and Fang-Ling Hu

Nanoelectronics and Gigascale Systems Laboratory
Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan

Abstract —

A new circuit design for mixed-voltage I/O buffers
to prevent hot-carrier degradation is proposed. The mixedvoltage
(2xVDD tolerant) I/O buffer is designed with hotcarrier-
prevented circuits in a 0.18-􀈝m CMOS process to
receive 3.3-V (2xVDD tolerant) input signals without suffering
gate-oxide reliability, circuit leakage issues, and hot-carrier
degradation. In the experimental chip, the proposed mixedvoltage
I/O buffer can be operated with signal speed of up to
266 MHz, which can fully meet the applications of PCI-X 2.0.

Avalon · 发表于 2007-10-31 18:00:10

谢谢，楼主了

LAS.xs · 发表于 2007-10-31 21:13:24

kankan

fanjx · 发表于 2007-10-31 22:41:58

讲什么的啊

semico_ljj · 发表于 2007-11-1 13:53:53

Abstract 里不都有!

weijj · 发表于 2008-11-18 20:38:29

附件是错的！！

fengzhishang58 · 发表于 2010-6-23 09:35:08

谢谢楼主分享

shrbht · 发表于 2010-11-28 14:28:55

谢谢分享啦

tiancai2008 · 发表于 2011-5-31 15:29:04

附件不对啊。

juhao0122 · 发表于 2011-5-31 20:47:27

Thanks for your sharing!

Design on Mixed-Voltage IO Buffers with Hot-Carrier Reliability(SCI 2007)

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