transient-induced latchup in CMOS ICs(期刊論文—SCI)

semico_ljj

論文名稱 Evaulation on board-level noise filter networks to suppress transient-induced latchup in CMOS ICs under system-level ESD test
指導教授 Ming-Dou Ker
研究生 S.-F. Hsu
日期 2006 -  02 分類
A.期刊論文—SCI
期刊 Ming-Dou Ker and S.-F. Hsu, Evaulation on board-level noise filter networks to suppress transient-induced latchup in CMOS ICs under system-level ESD test, IEEE Trans. on Electromagnetic Compatibility, vol. 48, no. 1, in press, Feb. 2006
摘要         Different types of board-level noise filter networks are evaluated to find their effectiveness for improving the immunity of CMOS ICs against the transient-induced latchup (TLU) under the system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified with the silicon-controlled rectifier (SCR) test structures and the ring oscillator circuit fabricated in a 0.25-umCMOS technology. Some board-level solutions can be further integrated into the chip design to effectively improve the TLU immunity of CMOS IC products.  
關鍵字 Board-level noise filter, latchup, SCR, systemlevel ESD test, transient-induced latchup (TLU).

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