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論文名稱 Gate-oxide reliability on CMOS Analog amplifiers in a 130-nm low-voltage CMOS process
指導教授 Ming-Dou Ker
研究生 J.-S. Chen
日期 2006 - 07 分類
B.研討會論文—國際
期刊 J.-S. Chen and Ming-Dou Ker, “Gate-oxide reliability on CMOS analog amplifiers in a 130-nm low-voltage CMOS process,”Proc. of 2006 International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, Jul. 3-7, 2006, pp. 45-48
摘要 The effect of gate-oxide reliability in MOSFET
on common-source amplifiers is investigated with the nonstacked and stacked structures in a 130-nm low-voltage CMOS process. The supply voltage of 2.5 V is applied on the amplifiers to accelerate and observe the impact of gate-oxide reliability on circuit performances including small-signal gain,
unity-gain frequency, and output DC voltage level under DC
stress and AC stress with DC offset, respectively. The small-signal parameters of amplifier with non-stacked structure strongly degrade under such overstress conditions. The gate-oxide reliability in analog circuit can be improved by stacked structure for small-signal input and output applications |
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