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latchup failure event of a power IC ( SCI 2006 )

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发表于 2007-10-29 11:30:26 | 显示全部楼层 |阅读模式

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論文名稱 Failure analysis and solutions to overcome latchup failure event of a power controller IC in bulk CMOS technology
指導教授 Ming-Dou Ker
研究生 S.-H. Chen
日期 2006 -  07 分類
A.期刊論文—SCI
期刊 S.-H. Chen and Ming-Dou Ker, “On-panel output buffer with offset compensation technique for data driver in LTPS technology,”Microelectronics Reliability, vol. 46, no. 7, pp. 1042-1049, Jul. 2006
摘要         Latchup failure which occurred at only one output pin of a power controller IC product is investigated in this work. The special design requirement of the internal circuits causes the parasitic diode that is inherent between the n-well and p-substrate to be a triggering source of the latchup occurrence in this IC. The parasitic diode of the internal PMOS was easily turned on by an anomalous external signal to trigger the neighbor parasitic Silicon Controlled Rectifier (SCR)
        path which causes latchup event in the CMOS IC product. Some solutions to overcome this latchup failure have been also proposed in this paper.

473_JMR_SHChen_Ker_July_2006.pdf

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 楼主| 发表于 2007-10-29 11:32:57 | 显示全部楼层
ESD LatchUP,all in all!
发表于 2008-3-10 16:44:16 | 显示全部楼层
good good good
发表于 2008-3-12 23:26:39 | 显示全部楼层
Thanks
发表于 2008-3-13 01:08:09 | 显示全部楼层

Ding!

发表于 2008-11-6 14:36:11 | 显示全部楼层
TKS!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
发表于 2008-11-6 15:27:59 | 显示全部楼层
Thanks.
发表于 2008-11-6 15:29:16 | 显示全部楼层
Xie Xie.
发表于 2010-9-22 11:42:13 | 显示全部楼层
Thanks.
发表于 2010-9-22 11:54:01 | 显示全部楼层
gooooooooood
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