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Low Power Methodology Manual
For System-on-Chip Design
The "Low Power Methodology Manual" (LPMM) is a comprehensive andpractical guide to managing power in system-on-chip designs, criticalto designers using 90-nanometer and below technology. The authors, alllow power experts, are led by Michael Keating, Synopsys Fellow andprincipal author of the widely adopted Reuse Methodology Manual for System-on-Chip Design,and David Flynn, ARM R&D Fellow and original architect behind ARM抯synthesizable CPU family and the AMBA® on-chip interconnect standard.Combining extensive commercial experience, deep scientificunderstanding, silicon technology case studies, and a pragmaticapproach, the authors describe design techniques which address bothdynamic and static (leakage) power, including methods for power gatingand dynamic voltage and frequency scaling. For each topic, the authorsdescribe the design challenge, provide a technology foundation, andthen make specific recommendations as well as a caution against designpitfalls. This book is a must-read for anyone designing, or gettingready to design, SOC's for low power applications. | 
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发表于 2007-10-21 23:16:46
