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Session 7 – Emerging Wireless Applications
Fir Ballroom, Monday Afternoon, September 17
Chair : Stefan Drude
Co-Chair : Earl McCune
Progress in achieving high levels of integration is presented for single chip solutions in satellite TV, WiMax-WiBRO, GPS, and RFID applications, using a variety of process technologies.
1:30 pm
Introduction
7.1 - 1:35 pm
A Single-Conversion SiGe BiCMOS Satellite TV LNB Front-End Using an Image Reject Mixer and a Calibrated Full-Rate VCO
A. Maxim, M. Gheorghe, D. Smith, Maxim, Inc.
7.2 - 2:00 pm
A Low Power, High Performance BiCMOS MIMO/Diversity Direct Conversion Transceiver IC For WiBro/WiMAX (802.16e) (INVITED PAPER)
M. Locher, M. Tomesen, J. Kuenen, A. Daanen, H. Visser, B. Essink, P.P. Vervoort, M. Nijrolder, R. Kopmeiners, W. Redman-White, R. Balmford, R. El Waffaoui, NXP Semiconductors
7.3 - 2:25 pm
A Low-IF CMOS Simultaneous GPS Receiver Integrated in a Multimode Transceiver
Y. Xu, K. Wang, T. Pals, A. Hadjichristos, K. Sahota and C. Persico, Qualcomm, Inc.
7.4 - 2:50 pm
A Single-Chip UHF RFID Reader in 0.18 µm CMOS
W. Wang, S. Lou, K. Chui, S. Rong, C.-F. Lok, H. Zheng, H.T. Chan, S.W. Man, H.C. Luong, V.K. Lau and C.-Y. Tsui, Hong Kong University of Science and Technology
Session 9 – Test, Characterization, and Jitter of High-Speed Serial I/O and Clocks
Cedar Ballroom
Monday Afternoon, September 17
Chair: Jeanne Trinko Mechler
Co-Chair : Gordon Roberts
Characterization, test and jitter measurements are reaching picosecond resolution for high speed serial links and clock networks.
1:30 pm
Introduction
9.1 - 1:35 pm
Testing SerDes Beyond 4 Gbps – Changing Priorities (INVITED PAPER)
S. Sunter and A. Roy, LogicVision
9.2 - 2:00 pm
Challenges and Solutions for Standards-Based Serial 10 Gb/s Backplane Ethernet (INVITED PAPER)
A. Healey, LSI Corporation
9.3 - 2:50 pm
2GS/s, 10ps Resolution CMOS Differential Time-to-Digital Converter for Real-Time Testing of Source-Synchronous Memory Device
K. Yamamoto, M. Suda and T. Okayasu, Advantest Corporation
3:15 pm - BREAK
9.4 - 3:35 pm
Optimizing Circuit Performance and ESD Protection for High-Speed Differential I/Os
H. Sarbishaei, O. Semenov and M. Sachdev, University of Waterloo
9.5 - 4:00 pm
Embedded Test Features for High-Speed Serial I/O (INVITED PAPER)
J. Rearick, Advanced Micro Devices
9.6 - 4:25 pm
On-Chip Circuit for Measuring Period Jitter and Skew of Clock Distribution Networks
K. Jenkins, IBM TJ Watson Research Center, K. Shepard and Z. Xu, Columbia University
9.7 - 4:50 pm
Mismatch-Tolerant Circuit for On-Chip Measurements of Data Jitter
K. Ichiyama, M. Ishida, T. Yamaguchi, Advantest Laboratories, and M. Soma, University of Washington |
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