柯明道－Design of mixedvoltage IO buffer by using NMOSblocking technique

semico_ljj

論文名稱	Design of mixed-voltage I/O buffer by using NMOS-blocking technique

期刊	Ming-Dou Ker and S.-L. Chen, “Design of mixed-voltage I/O buffer by using NMOS-blocking technique,”IEEE Journal of Solid-State Circuits, vol. 41, no. 10, pp. 2324-2333, Oct. 2006.
摘要	An nMOS-blocking technique for mixed-voltage I/O buffer realized with only 1 VDD devices can receive 2XVDD, 3XVDD, and even 4XVDD input signal without the gate-oxide reliability issue is proposed. In this paper, the 2 VDD input tolerant mixed-voltage I/O buffer by using the nMOS-blocking technique has been verified in a 0.25-um 2.5-V CMOS process to serve 2.5/5-V mixed-voltage interface. The 3 VDD input tolerant mixed-voltage I/O buffer by using the nMOS-blocking technique has been verified in a 0.13-um 1-V CMOS process to serve 1/3-V mixed-voltage interface. The proposed nMOS-blocking technique can be extended to design the 4XVDD, 5XVDD, and even 6XVDD input tolerant mixed-voltage I/O buffers. The limitation of the nMOS-blocking technique is the breakdown voltage of the pn-junction in the given CMOS process
關鍵字	Gate-oxide reliability, hot-carrier degradation, interface, junction breakdown, mixed-voltage I/O buffer

zhxdoctor

xiexie  louzhu!!!

pjing57

thanks!

elliot_cai

Thanks!

semico_ljj

blinder

偶来取经啦

lhwei2008

Thanks!

skysky

论文中没有提及如何设计4xVdd的动态偏置电路？有没有人设计过这种电路，或者类似的资料参考一下？谢谢

renrensd

thanks!

Caroline11

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