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[招聘] 比特大陆武汉site社招AI芯片IC设计&验证岗

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发表于 2018-5-15 11:56:16 | 显示全部楼层 |阅读模式

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比特大陆社招,site武汉,IP和SoC,长期有效~~2年以上工作经验即可,有兴趣者可以咨询&发送简历到 hao.lv@bitmain.com,设计&验证都招,内推 ~
芯片验证工程师 Senior IC Verification Engineer
Responsibilities:
Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's
Create verification environment for both directed and random verification
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers and post-silicon teams
Requirements:
BS / MS with 2+ years of experience in design verification
Experience in design verification for CPU related IPs are highly desirable
Experience as verification lead for complex IP
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Simvision)
Expertise in Verilog
Experience in SystemVerilog, UVM is highly desirable
Excellent communication skills and ability to lead highly competent team.
Strong debugging and problem solving skills
Scripting knowledge (Python/Perl/shell)
Strong fundamentals in computer architecture desirable
C++ programming language experience desirable


资深芯片设计工程师  Senior IC/ASIC/SOC Design Expert
Responsibilities:
IC Block design for all frontend phase
IC chip level design for all font-end phase
Architecture define
RTL implementation
Analysis and Optimization for performance
Analysis and Optimization for power
Analysis and Optimization for timing
Design flow: lint/synthesis/sta/formal check
Silicon debugging
Requirements:
BS / MS with 5+ years of experience in ASIC or FPGA design
Experience with CPU related IPs design are highly desirable
Experience as design lead for complex or high speed IPs
Experience with all phases of frontend architecture, design and validation
RTL Coding, Design Reviews, SYN, CDC, FEV, DFT insertion, ATPG analysis
Demonstrated work experience with timing Analysis, Area and Power optimizations, Performance Analysis, Debug ability and Security analysis, ECOs, and Post-Silicon Debug
Excellent knowledge of Verilog and popular EDA simulation & implementation tools
Good experience in scripting languages like Perl, Unix shell or similar languages
发表于 2018-5-15 15:44:52 | 显示全部楼层
湖北人想会武汉啊。有没有模拟设计的职位
发表于 2018-5-16 11:56:20 | 显示全部楼层
武汉工作地点具体在哪里呀
发表于 2018-5-25 13:36:50 | 显示全部楼层
回复 1# lvtv


   有模拟设计的职位吗?
 楼主| 发表于 2018-6-5 12:42:56 | 显示全部楼层
回复 4# Cruise.lj


    有模拟岗。
 楼主| 发表于 2018-6-5 12:43:34 | 显示全部楼层
回复 2# wandola
有模拟岗。
 楼主| 发表于 2018-6-5 12:44:42 | 显示全部楼层
回复 3# zcunsh


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