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DRC通过了，LVS出了问题，几天都解决不了，来求助各位大神，希望帮小弟看看，问题出在哪。
##################################################
## ##
## C A L I B R E S Y S T E M ##
## ##
## L V S R E P O R T ##
## ##
##################################################
REPORT FILE NAME: bootstrap_switch.lvs.report
LAYOUT NAME: svdb/bootstrap_switch.sp ('bootstrap_switch')
SOURCE NAME: /home/cyj/workstation/bootstrap_switch.src.net ('bootstrap_switch')
RULE FILE: /home/cyj/workstation/_SmicSPM10RR13R_cal018_mixRF_sali_p1mtx_1833.lvs_
CREATION TIME: Sat May 12 15:50:40 2018
CURRENT DIRECTORY: /home/cyj/workstation
USER NAME: cyj
CALIBRE VERSION: v2014.4_18.13 Wed Nov 5 16:04:06 PST 2014
OVERALL COMPARISON RESULTS
# # #####################
# # # #
# # INCORRECT #
# # # #
# # #####################
Error: Different numbers of instances.
Error: Connectivity errors.
**************************************************************************************************************
CELL SUMMARY
**************************************************************************************************************
Result Layout Source
----------- ----------- --------------
INCORRECT bootstrap_switch bootstrap_switch
**************************************************************************************************************
LVS PARAMETERS
**************************************************************************************************************
o LVS Setup:
// LVS COMPONENT TYPE PROPERTY
// LVS COMPONENT SUBTYPE PROPERTY
// LVS PIN NAME PROPERTY
LVS POWER NAME "AVDD" "VDD" "SAVDD?" "VCC?" "?VDD?" "?VCC?" "?vcc?" "?vdd?"
LVS GROUND NAME "AVSS" "VSS" "SAVSS?" "gnd" "GND" "?VSS?" "?vss?"
LVS CELL SUPPLY NO
LVS RECOGNIZE GATES ALL
LVS IGNORE PORTS NO
LVS CHECK PORT NAMES YES
LVS IGNORE TRIVIAL NAMED PORTS NO
LVS BUILTIN DEVICE PIN SWAP YES
LVS ALL CAPACITOR PINS SWAPPABLE YES
LVS DISCARD PINS BY DEVICE NO
LVS SOFT SUBSTRATE PINS NO
LVS INJECT LOGIC YES
LVS EXPAND UNBALANCED CELLS YES
LVS FLATTEN INSIDE CELL NO
LVS EXPAND SEED PROMOTIONS NO
LVS PRESERVE PARAMETERIZED CELLS NO
LVS GLOBALS ARE PORTS YES
LVS REVERSE WL NO
LVS SPICE PREFER PINS YES
LVS SPICE SLASH IS SPACE YES
LVS SPICE ALLOW FLOATING PINS YES
// LVS SPICE ALLOW INLINE PARAMETERS
LVS SPICE ALLOW UNQUOTED STRINGS NO
LVS SPICE CONDITIONAL LDD NO
LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO
LVS SPICE IMPLIED MOS AREA NO
LVS SPICE MULTIPLIER NAME "M" "MR"
LVS SPICE OVERRIDE GLOBALS NO
LVS SPICE REDEFINE PARAM NO
LVS SPICE REPLICATE DEVICES NO
LVS SPICE SCALE X PARAMETERS NO
LVS SPICE STRICT WL NO
// LVS SPICE OPTION
LVS STRICT SUBTYPES NO
LVS EXACT SUBTYPES NO
LAYOUT CASE NO
SOURCE CASE NO
LVS COMPARE CASE NO
LVS DOWNCASE DEVICE NO
LVS REPORT MAXIMUM 50
LVS PROPERTY RESOLUTION MAXIMUM 65536
// LVS SIGNATURE MAXIMUM
// LVS FILTER UNUSED OPTION
// LVS REPORT OPTION
LVS REPORT UNITS YES
// LVS NON USER NAME PORT
// LVS NON USER NAME NET
// LVS NON USER NAME INSTANCE
// LVS IGNORE DEVICE PIN
// Reduction
LVS REDUCE SERIES MOS NO
LVS REDUCE PARALLEL MOS YES
LVS REDUCE SEMI SERIES MOS NO
LVS REDUCE SPLIT GATES YES
LVS REDUCE PARALLEL BIPOLAR YES
LVS REDUCE SERIES CAPACITORS YES
LVS REDUCE PARALLEL CAPACITORS YES
LVS REDUCE SERIES RESISTORS YES
LVS REDUCE PARALLEL RESISTORS YES
LVS REDUCE PARALLEL DIODES YES
LVS REDUCE pvar18_ckt PARALLEL
LVS REDUCE pvar33_ckt PARALLEL
LVS REDUCE rnwaa_ckt SERIES PLUS MINUS
LVS REDUCE rnwaa_ckt PARALLEL
LVS REDUCE rnwsti_ckt SERIES PLUS MINUS
LVS REDUCE rnwsti_ckt PARALLEL
LVS REDUCE rpdif_ckt SERIES PLUS MINUS
LVS REDUCE rpdif_ckt PARALLEL
LVS REDUCE rndif_ckt SERIES PLUS MINUS
LVS REDUCE rndif_ckt PARALLEL
LVS REDUCE rppo_ckt SERIES PLUS MINUS
LVS REDUCE rppo_ckt PARALLEL
LVS REDUCE rppo_3t_ckt SERIES PLUS MINUS
LVS REDUCE rppo_3t_ckt PARALLEL
LVS REDUCE rnpo_ckt SERIES PLUS MINUS
LVS REDUCE rnpo_ckt PARALLEL
LVS REDUCE rnpo_3t_ckt SERIES PLUS MINUS
LVS REDUCE rnpo_3t_ckt PARALLEL
LVS REDUCE rpdifsab_ckt SERIES PLUS MINUS
LVS REDUCE rpdifsab_ckt PARALLEL
LVS REDUCE rndifsab_ckt SERIES PLUS MINUS
LVS REDUCE rndifsab_ckt PARALLEL
LVS REDUCE rpposab_ckt SERIES PLUS MINUS
LVS REDUCE rpposab_ckt PARALLEL
LVS REDUCE rpposab_3t_ckt SERIES PLUS MINUS
LVS REDUCE rpposab_3t_ckt PARALLEL
LVS REDUCE rnposab_ckt SERIES PLUS MINUS
LVS REDUCE rnposab_ckt PARALLEL
LVS REDUCE rnposab_3t_ckt SERIES PLUS MINUS
LVS REDUCE rnposab_3t_ckt PARALLEL
LVS REDUCE rhrpo_ckt SERIES PLUS MINUS
LVS REDUCE rhrpo_ckt PARALLEL
LVS REDUCE rhrpo_3t_ckt SERIES PLUS MINUS
LVS REDUCE rhrpo_3t_ckt PARALLEL
LVS REDUCE rndifsab_ckt_rf SERIES PLUS MINUS
LVS REDUCE rndifsab_ckt_rf PARALLEL
LVS REDUCE rpdifsab_ckt_rf SERIES PLUS MINUS
LVS REDUCE rpdifsab_ckt_rf PARALLEL
LVS REDUCE rnposab_ckt_rf SERIES PLUS MINUS
LVS REDUCE rnposab_ckt_rf PARALLEL
LVS REDUCE rpposab_ckt_rf SERIES PLUS MINUS
LVS REDUCE rpposab_ckt_rf PARALLEL
LVS REDUCE rhrpo_ckt_rf SERIES PLUS MINUS
LVS REDUCE rhrpo_ckt_rf PARALLEL
LVS REDUCTION PRIORITY PARALLEL
LVS SHORT EQUIVALENT NODES NO
// Trace Property
TRACE PROPERTY mn(n18) l l 5
TRACE PROPERTY mn(n18) w w 5
TRACE PROPERTY mn(n33) l l 5
TRACE PROPERTY mn(n33) w w 5
TRACE PROPERTY mp(p18) l l 5
TRACE PROPERTY mp(p18) w w 5
TRACE PROPERTY mp(p33) l l 5
TRACE PROPERTY mp(p33) w w 5
TRACE PROPERTY mn(nnt18) l l 5
TRACE PROPERTY mn(nnt18) w w 5
TRACE PROPERTY mn(nnt33) l l 5
TRACE PROPERTY mn(nnt33) w w 5
TRACE PROPERTY mn(nmvt18) l l 5
TRACE PROPERTY mn(nmvt18) w w 5
TRACE PROPERTY mn(nmvt33) l l 5
TRACE PROPERTY mn(nmvt33) w w 5
TRACE PROPERTY mp(pmvt18) l l 5
TRACE PROPERTY mp(pmvt18) w w 5
TRACE PROPERTY m(c1) l l 5
TRACE PROPERTY m(c1) w w 5
TRACE PROPERTY m(c2) l l 5
TRACE PROPERTY m(c2) w w 5
TRACE PROPERTY pvar18_ckt wr wr 5
TRACE PROPERTY pvar18_ckt lr lr 5
TRACE PROPERTY pvar18_ckt nf nf 0
TRACE PROPERTY pvar33_ckt wr wr 5
TRACE PROPERTY pvar33_ckt lr lr 5
TRACE PROPERTY pvar33_ckt nf nf 0
TRACE PROPERTY d(pdio18) a a 5
TRACE PROPERTY d(pdio33) a a 5
TRACE PROPERTY d(ndio18) a a 5
TRACE PROPERTY d(ndio33) a a 5
TRACE PROPERTY d(nndio18) a a 5
TRACE PROPERTY d(nndio33) a a 5
TRACE PROPERTY d(nwdio) a a 5
TRACE PROPERTY d(diobpw) a a 5
TRACE PROPERTY q(pnp18a4) a a 5
TRACE PROPERTY q(pnp18a25) a a 5
TRACE PROPERTY q(pnp18a100) a a 5
TRACE PROPERTY q(pnp33a4) a a 5
TRACE PROPERTY q(pnp33a25) a a 5
TRACE PROPERTY q(pnp33a100) a a 5
TRACE PROPERTY q(npn18a4) a a 5
TRACE PROPERTY q(npn18a25) a a 5
TRACE PROPERTY q(npn18a100) a a 5
TRACE PROPERTY q(npn33a4) a a 5
TRACE PROPERTY q(npn33a25) a a 5
TRACE PROPERTY q(npn33a100) a a 5
TRACE PROPERTY rnwaa_ckt w w 5
TRACE PROPERTY rnwaa_ckt l l 5
TRACE PROPERTY rnwsti_ckt w w 5
TRACE PROPERTY rnwsti_ckt l l 5
TRACE PROPERTY rpdif_ckt w w 5
TRACE PROPERTY rpdif_ckt l l 5
TRACE PROPERTY rndif_ckt w w 5
TRACE PROPERTY rndif_ckt l l 5
TRACE PROPERTY rppo_ckt w w 5
TRACE PROPERTY rppo_ckt l l 5
TRACE PROPERTY rppo_3t_ckt w w 5
TRACE PROPERTY rppo_3t_ckt l l 5
TRACE PROPERTY rnpo_ckt w w 5
TRACE PROPERTY rnpo_ckt l l 5
TRACE PROPERTY rnpo_3t_ckt w w 5
TRACE PROPERTY rnpo_3t_ckt l l 5
TRACE PROPERTY rpdifsab_ckt w w 5
TRACE PROPERTY rpdifsab_ckt l l 5
TRACE PROPERTY rndifsab_ckt w w 5
TRACE PROPERTY rndifsab_ckt l l 5
TRACE PROPERTY rpposab_ckt w w 5
TRACE PROPERTY rpposab_ckt l l 5
TRACE PROPERTY rpposab_3t_ckt w w 5
TRACE PROPERTY rpposab_3t_ckt l l 5
TRACE PROPERTY rnposab_ckt w w 5
TRACE PROPERTY rnposab_ckt l l 5
TRACE PROPERTY rnposab_3t_ckt w w 5
TRACE PROPERTY rnposab_3t_ckt l l 5
TRACE PROPERTY rhrpo_ckt w w 5
TRACE PROPERTY rhrpo_ckt l l 5
TRACE PROPERTY rhrpo_3t_ckt w w 5
TRACE PROPERTY rhrpo_3t_ckt l l 5
TRACE PROPERTY r(rnwaa) r r 5
TRACE PROPERTY r(rnwsti) r r 5
TRACE PROPERTY r(rndif) r r 5
TRACE PROPERTY r(rndifsab) r r 5
TRACE PROPERTY r(rpdif) r r 5
TRACE PROPERTY r(rpdifsab) r r 5
TRACE PROPERTY r(rnpo) r r 5
TRACE PROPERTY r(rnpo_3t) r r 5
TRACE PROPERTY r(rnposab) r r 5
TRACE PROPERTY r(rnposab_3t) r r 5
TRACE PROPERTY r(rppo) r r 5
TRACE PROPERTY r(rppo_3t) r r 5
TRACE PROPERTY r(rpposab) r r 5
TRACE PROPERTY r(rpposab_3t) r r 5
TRACE PROPERTY r(rhrpo) r r 5
TRACE PROPERTY r(rhrpo_3t) r r 5
TRACE PROPERTY r(rm1) r r 5
TRACE PROPERTY r(rm2) r r 5
TRACE PROPERTY r(rm3) r r 5
TRACE PROPERTY r(rm4) r r 5
TRACE PROPERTY r(rm5) r r 5
TRACE PROPERTY r(rm6_rf) r r 5
TRACE PROPERTY c(cpm) c c 5
TRACE PROPERTY c(mim) c c 5
TRACE PROPERTY n18_ckt_rf wr wr 5
TRACE PROPERTY n18_ckt_rf lr lr 5
TRACE PROPERTY n18_ckt_rf nf nf 0
TRACE PROPERTY dnw18_ckt_rf wr wr 5
TRACE PROPERTY dnw18_ckt_rf lr lr 5
TRACE PROPERTY dnw18_ckt_rf nf nf 0
TRACE PROPERTY dnw18_ckt_rf laddr laddr 5
TRACE PROPERTY dnw18_ckt_rf waddr waddr 5
TRACE PROPERTY dnw33_ckt_rf wr wr 5
TRACE PROPERTY dnw33_ckt_rf lr lr 5
TRACE PROPERTY dnw33_ckt_rf nf nf 0
TRACE PROPERTY dnw33_ckt_rf laddr laddr 5
TRACE PROPERTY dnw33_ckt_rf waddr waddr 5
TRACE PROPERTY p18_ckt_rf wr wr 5
TRACE PROPERTY p18_ckt_rf lr lr 5
TRACE PROPERTY p18_ckt_rf nf nf 0
TRACE PROPERTY n33_ckt_rf wr wr 5
TRACE PROPERTY n33_ckt_rf lr lr 5
TRACE PROPERTY n33_ckt_rf nf nf 0
TRACE PROPERTY p33_ckt_rf wr wr 5
TRACE PROPERTY p33_ckt_rf lr lr 5
TRACE PROPERTY p33_ckt_rf nf nf 0
TRACE PROPERTY pvar18w10l1_ckt_rf wr wr 5
TRACE PROPERTY pvar18w10l1_ckt_rf lr lr 5
TRACE PROPERTY pvar18w10l1_ckt_rf nf nf 0
TRACE PROPERTY pvar18w10ld5_ckt_rf wr wr 5
TRACE PROPERTY pvar18w10ld5_ckt_rf lr lr 5
TRACE PROPERTY pvar18w10ld5_ckt_rf nf nf 0
TRACE PROPERTY pvar18w5l1_ckt_rf wr wr 5
TRACE PROPERTY pvar18w5l1_ckt_rf lr lr 5
TRACE PROPERTY pvar18w5l1_ckt_rf nf nf 0
TRACE PROPERTY pvar18w5ld5_ckt_rf wr wr 5
TRACE PROPERTY pvar18w5ld5_ckt_rf lr lr 5
TRACE PROPERTY pvar18w5ld5_ckt_rf nf nf 0
TRACE PROPERTY pvar33w10l1_ckt_rf wr wr 5
TRACE PROPERTY pvar33w10l1_ckt_rf lr lr 5
TRACE PROPERTY pvar33w10l1_ckt_rf nf nf 0
TRACE PROPERTY pvar33w10ld5_ckt_rf wr wr 5
TRACE PROPERTY pvar33w10ld5_ckt_rf lr lr 5
TRACE PROPERTY pvar33w10ld5_ckt_rf nf nf 0
TRACE PROPERTY pvardio18_ckt_rf wr wr 5
TRACE PROPERTY pvardio18_ckt_rf lr lr 5
TRACE PROPERTY pvardio18_ckt_rf nf nf 0
TRACE PROPERTY pvardio33_ckt_rf wr wr 5
TRACE PROPERTY pvardio33_ckt_rf lr lr 5
TRACE PROPERTY pvardio33_ckt_rf nf nf 0
TRACE PROPERTY rndifsab_ckt_rf l l 5
TRACE PROPERTY rndifsab_ckt_rf w w 5
TRACE PROPERTY rpdifsab_ckt_rf l l 5
TRACE PROPERTY rpdifsab_ckt_rf w w 5
TRACE PROPERTY rnposab_ckt_rf l l 5
TRACE PROPERTY rnposab_ckt_rf w w 5
TRACE PROPERTY rpposab_ckt_rf l l 5
TRACE PROPERTY rpposab_ckt_rf w w 5
TRACE PROPERTY rhrpo_ckt_rf l l 5
TRACE PROPERTY rhrpo_ckt_rf w w 5
TRACE PROPERTY mim1_rf lr lr 5
TRACE PROPERTY mim1_rf wr wr 5
TRACE PROPERTY ind_rf r r 5
TRACE PROPERTY ind_rf n n 0
TRACE PROPERTY diff_ind_rf r r 5
TRACE PROPERTY diff_ind_rf n n 0
TRACE PROPERTY diff_ind_3t_rf r r 5
TRACE PROPERTY diff_ind_3t_rf n n 0
TRACE PROPERTY mom_rf lr lr 5
TRACE PROPERTY mom_rf nf nf 0
TRACE PROPERTY mom_rf_3t lr lr 5
TRACE PROPERTY mom_rf_3t nf nf 0
CELL COMPARISON RESULTS ( TOP LEVEL )
# # #####################
# # # #
# # INCORRECT #
# # # #
# # #####################
Error: Different numbers of instances (see below).
Error: Connectivity errors.
LAYOUT CELL NAME: bootstrap_switch
SOURCE CELL NAME: bootstrap_switch
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
Layout Source Component Type
------ ------ --------------
Ports: 5 5
Nets: 13 13
Instances: 56 11 * MN (4 pins)
17 3 * MP (4 pins)
3 3 C (2 pins)
------ ------
Total Inst: 76 17
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
Layout Source Component Type
------ ------ --------------
Ports: 5 5
Nets: 12 12
Instances: 7 7 MN (4 pins)
1 1 MP (4 pins)
3 3 C (2 pins)
1 0 * INV (2 pins)
1 1 _invb (6 pins)
0 1 * _invv (4 pins)
1 1 _sdw2v (4 pins)
------ ------
Total Inst: 14 14
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne = Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
1 Net CLK CLK
--- 6 Connections On This Net --- --- 4 Connections On This Net ---
-------------------------- --------------------------
(INV):input ** missing connection **
M3(3.420,32.030):g
M20(3.200,29.940):g
M24(8.410,29.940):s ** missing connection **
M21(4.995,29.940):g ** missing connection **
** missing connection ** (_invv):in
MNM12:g
MPM1:g
--------------------------------------------------------------------------------------------------------------
2 Net 1 clksb
--- 7 Connections On This Net --- --- 4 Connections On This Net ---
-------------------------- --------------------------
(INV) utput ** missing connection **
M3(3.420,32.030):d
M20(3.200,29.940):d
M47(28.930,31.850):g ** missing connection **
M24(8.410,29.940):g ** missing connection **
M21(4.995,29.940):d ** missing connection **
** missing connection ** (_invv)ut
MNM12:d
MPM1:d
--------------------------------------------------------------------------------------------------------------
3 Net 5 net053
--- 1 Connections On This Net --- --- 3 Connections On This Net ---
-------------------------- --------------------------
** missing connection ** MNM10:g
** missing connection ** MNM11:s
--------------------------------------------------------------------------------------------------------------
4 Net 3 net8
--- 8 Connections On This Net --- --- 5 Connections On This Net ---
-------------------------- --------------------------
M47(28.930,31.850):s ** missing connection **
M11(14.170,32.015):b ** missing connection **
M11(14.170,32.015):s ** missing connection **
** missing connection ** (_invb):sup2
MNM15:s
--------------------------------------------------------------------------------------------------------------
5 Net 4 ** no similar net **
--------------------------------------------------------------------------------------------------------------
6 Net 6 ** no similar net **
--------------------------------------------------------------------------------------------------------------
7 ** no similar net ** net046
--------------------------------------------------------------------------------------------------------------
8 ** no similar net ** net039
**************************************************************************************************************
INCORRECT INSTANCES
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
9 (INV) ** missing gate **
Transistors:
M3(3.420,32.030) MP(P18)
M20(3.200,29.940) MN(N18)
--------------------------------------------------------------------------------------------------------------
10 ** missing injected instance ** (_invv)
Devices:
MPM1 MP(P18)
MNM12 MN(N18)
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
Matched Matched Unmatched Unmatched Component
Layout Source Layout Source Type
------- ------- --------- --------- ---------
Ports: 5 5 0 0
Nets: 10 10 2 2
Instances: 7 7 0 0 MN(N18)
1 1 0 0 MP(P18)
3 3 0 0 C(MIM)
0 0 1 0 INV
1 1 0 0 _invb
0 0 0 1 _invv
1 1 0 0 _sdw2v
------- ------- --------- ---------
Total Inst: 13 13 1 1
o Statistics:
71 layout mos transistors were reduced to 12.
59 mos transistors were deleted by parallel reduction.
o Initial Correspondence Points:
Ports: AVDD AVSS CLK VIN VOUT
**************************************************************************************************************
DETAILED INSTANCE CONNECTIONS
LAYOUT NAME SOURCE NAME
**************************************************************************************************************
(This section contains detailed information about connections of
matched instances that are involved in net discrepancies).
--------------------------------------------------------------------------------------------------------------
M11(14.170,32.015) MP(P18) MPM2 MP(P18)
g: 7 g: net5
d: 8 d: net15
s: 3 ** net8 **
b: 3 ** net8 **
** no similar net ** s: net039
** no similar net ** b: net039
--------------------------------------------------------------------------------------------------------------
M21(4.995,29.940) MN(N18) MNM10 MN(N18)
s: AVDD d: AVDD
b: AVSS b: AVSS
g: CLK ** CLK **
d: 1 ** clksb **
** 5 ** g: net053
** no similar net ** s: net046
--------------------------------------------------------------------------------------------------------------
M24(8.410,29.940) MN(N18) MNM11 MN(N18)
d: AVDD d: AVDD
b: AVSS b: AVSS
g: 1 ** clksb **
s: CLK ** CLK **
** no similar net ** g: net046
** 5 ** s: net053
--------------------------------------------------------------------------------------------------------------
M47(28.930,31.850) MN(N18) MNM16 MN(N18)
d: AVDD d: AVDD
b: AVSS b: AVSS
g: 1 ** clksb **
s: 3 ** net8 **
** no similar net ** g: net046
** no similar net ** s: net039
**************************************************************************************************************
SUMMARY
**************************************************************************************************************
Total CPU Time: 0 sec
Total Elapsed Time: 0 sec |
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发表于 2018-5-12 15:52:19
