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 楼主|
发表于 2007-8-31 13:57:22
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是这个程序!!!!!!!| Library IEEE; use IEEE.STD_LOGIC_1164.ALL;
 ENTITY SHIFTER IS
 PORT(CLK,M,C0:IN STD_LOGIC;
 S : IN    STD_LOGIC_VECTOR(1 DOWNTO 0);
 D : IN    STD_LOGIC_VECTOR(7 DOWNTO 0);
 QB: OUT   STD_LOGIC_VECTOR(7 DOWNTO 0);
 CN: OUT   STD_LOGIC);
 END ENTITY;
 ARCHITECTURE BEHAV OF SHIFTER IS
 SIGNAL ABC : STD_LOGIC_VECTOR(2 DOWNTO 0);
 SIGNAL REG : STD_LOGIC_VECTOR(7 DOWNTO 0);
 SIGNAL  CY : STD_LOGIC;
 BEGIN
 PROCESS(CLK,ABC,C0)
 BEGIN
 IF CLK'EVENT AND CLK = '1' THEN
 CASE ABC IS
 WHEN "011" =>REG(0)<= C0; REG(7 DOWNTO 1)<= REG (6 DOWNTO 0);
 CY <=REG(7);
 WHEN "010" =>REG(0)<=REG(7); REG(7 DOWNTO 1)<=REG(6 DOWNTO 0);
 WHEN "100" =>REG(7)<=REG(0); REG(6 DOWNTO 0)<=REG(7 DOWNTO 1);
 WHEN "101" =>REG(7)<= C0 ; REG(6 DOWNTO 0) <= REG(7 DOWNTO 1);
 CY <= REG(0);
 WHEN "110" =>REG(7 DOWNTO 0) <= D(7 DOWNTO 0);
 WHEN "111" =>REG(7 DOWNTO 0) <= D(7 DOWNTO 0);
 WHEN OTHERS => REG <= REG ; CY <= CY;
 END CASE;
 END IF;
 END PROCESS;
 ABC <= S & M; QB(7 DOWNTO 0)<= REG(7 DOWNTO 0);CN<=CY;
 END BEHAV;
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