SIGNAL V :STD_LOGIC_VECTOR(8 DOWNTO 0);
SIGNAL H :STD_LOGIC_VECTOR(8 DOWNTO 0);
signal VS_Total_CLK :std_logic_vector(15 downto 0);
signal HS_Total_CLK :std_logic_vector(15 downto 0);
对它们进行如下操作:
IF (V=VS_Total_CLK AND H=HS_Total_CLK) THEN
V <="000000000";
H <="000000000";
end if;