本帖最后由 存在感 于 2018-4-3 19:55 编辑
分两情况,1用calibre 图形界面run 检查filter 开关 有没有打开AE。如果没有检查期间层次是否丢失。
2.如果用命令run,检查使用文件中AE开关有没有打开,你上传的文件并没打开AE开关。如果识别不了还是建议查看层次是否丢失。
另外你的器件B端(或叫body或者叫buck)是否能被文件识别。发现lvs文件定义如下
//* Define device -- pmos pch_mac
gatenw1 = gate AND nxwell // gate inside nxwell ( NW & NWLVT )
gatenw = gatenw1 NOT NWLVT // gate inside nwell ( pmos gate )
pgate_imp = PP AND PMETAL
tpgate0 = gatenw AND pgate_imp
tpgate1 = tpgate0 NOT INTERACT udm_rpo
tpgate2 = tpgate1 NOT OD25
tpgate3 = tpgate2 NOT OD33
tpgate4 = tpgate3 NOT OD18
tpgate5 = tpgate4 NOT OD_12
tpgate6 = COPY tpgate5
pgate1 = tpgate6 NOT VTL_P
pgate2 = pgate1 NOT VTH_P
pgate3a = pgate2 NOT VTUL_P
pgate3b = pgate3a NOT eVTL_P
pgate3c = pgate3b NOT UHVT_P
pgate3d = pgate3c NOT EHVT_P
pgate3 = pgate3d NOT AVT
pgate4 = pgate3 NOT ILVT
pgate5 = pgate4 NOT OD1T
pgate6 = pgate5 NOT DCO
pgate7 = COPY pgate6
pgate8 = COPY pgate7
pgate9 = pgate8 NOT POSall
pgate10a = pgate9 NOT OD_HG
pgate10 = pgate10a NOT OD15
pgate_mac = pgate10 NOT TN2 // CORE PMOS MAC
DEVICE MP(pch_mac) pgate_macz pgate_mac(G) tpdiff(S) tpdiff(D) nxwell(B) netlist model pch_mac netlist element "X" CMACRO dfm_pmos
#IFDEF MULTI_DEVICE_EXTRACTION
TEMPLATE "pch_mac"
pgate_mac_in_edge = pgate_mac INSIDE EDGE tpdiff
pgate_mac_coin_edge = pgate_mac COIN EDGE tpdiff
pgate_mac_WL = DFM PROPERTY pgate_mac pgate_mac_in_edge pgate_mac_coin_edge MULTI OVERLAP
[ drawn_w = (length(pgate_mac_in_edge) + length(pgate_mac_coin_edge))/2 ]
[ drawn_l = area(pgate_mac)/property_ref(drawn_w) ]
pch_mac_ODN_layer = DEVICE LAYER TEMPLATE "pch_mac" ANNOTATE OD_p pgate_mac_WL
[PROPERTY ODN, pname, drawn_w, drawn_l
ODN = DFM_NUM_VAL( OD_p, ODNET)
pname = "pch_mac"
drawn_w = DFM_NUM_VAL( pgate_mac_WL, "drawn_w" )
drawn_l = DFM_NUM_VAL( pgate_mac_WL, "drawn_l" )
]
LVS ANNOTATE DEVICES pch_mac_ODN_layer
#ENDIF |