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坐标:AMD上海, SOC integration team 紧急招聘SMTS/MTS/Sr Enginerr,team内部推荐,成功率非常高!
简历请投我的邮 icpeter@sina.com。欢迎联系!
Job Responsibilities:
o Responsible for Front-End chip implementation including design, implementation and execution of the flow that starts with RTL code and ends with the delivery of a netlist package ready for physical design.
o Responsible for ASIC design methodology and flow development, interfacing with EDA vendors on technology.
Job Requirements:
o Familiar with Verilog RTL design and has experience of large digital ASIC project.
o Familiar with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal,Verde)
o Familiar with unix/linux and scripts (tcl, perl etc.)
o Fluent English on talking, presentation and writing documents.
o Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager. |
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