马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
本帖最后由 fallzzz 于 2018-2-27 14:56 编辑
芯原微电子大批高薪职位来袭!AI/AR GPU, 验证~~待遇无限好,前途无限量!
工作地点: 上海招聘岗位如下,有兴趣的同学们可以发简历给我哦~
内推邮箱: fallzzz@126.com
1.Staff/Sr. Staff Engineer -- GPU ASIC Design Responsibilities: Designtop-of-the-line Graphics/Vision processors, including specification,architecture, micro-architecture, implementation (using Verilog), andverification. Expected skills: 1. 3+ years hands-on experience. 2. Programming skills in Verilog HDL. 3. Must be familiar with all stages of the ASICdesign flow (including specification, architecture, and design implementation). 4. Highly motivated and skillful at solvingdifficult technical problems. 5. Knowledge of computer graphics and low-powerdesign techniques is a plus. 6. Experience of GPU design is a plus. 7. Experience of memory controller design orcompression design is a plus.
2. Staff/Sr. Staff Engineer -- AI/AR ASICDesign Responsibilities: Designtop-of-the-line Vision process/Deep learning, including specification,architecture, micro-architecture, implementation (using Verilog), andverification. Requirements: 1. 3+ years hands-on experience. 2. Programming skills in Verilog HDL. 3. Must be familiar with all stages of the ASICdesign flow (including specification, architecture, and design implementation). 4. Highly motivated and skillful at solvingdifficult technical problems. 5. Knowledge of computing and low-power designtechniques is a plus. 6. Experience of Vision process design or OpenCLVX is a plus. 7. Experience of CNN and deep learning design isa plus.
3.Sr. Engineer/Staff Engineer of Verification Responsibilities: 1. Understanding the expected functionality ofdesigns. 2. Developing testing and regression plans. 3. Designing and developing verificationenvironment. 4. Running RTL and gate-levelsimulations/regression. 5. Code/functional coverage development,analysis and closure.
Requirements: 1. Minimum of 3 years design/verificationexperience (test plan, test bench, assertions, debugging designs, code coverageetc.). 2. Knowledge in ASIC/FPGA design process andverification tools/env ( UVM/OVM…). 3. Familiar with design and verificationlanguages (Verilog, System Verilog, SVA etc.). 4. Scripting and automation skills (tcl, perl,makefile etc) a plus. 5. Familiar with C/C++. 6. Knowledge of DDR/Video/ARM/USB/PCIE , LowPower Verification with UPF and design experience is a plus. 7. Experience in CPU/DSP verification, includingtest plan and test bench development, test case development and test coverageassessment. and Knowledge of computer architecture and micro-architecture(pipeline, out-of-order, cache) is a plus. 8. Additional qualifications include: Good ICverification skills and basic knowledge of logic or circuit design, goodcommunication and problem solving skills. 9. Independent and self-managing. |