Design Compiler re-synthesized the module

xiaoyisimonguo · 发表于 2018-2-23 05:10:33

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I am runing DC on top level. And some of the modules in the top level are already built
with target library cells.
And I found that
Design Compiler re-synthesized the module already built with target library cells
Do we have a way to tell DC not to touch those instances with target library cells?

snakkewang · 发表于 2018-3-7 11:33:34

please set_dont_touch to that module.

xiaoyisimonguo · 发表于 2018-3-7 13:22:31

回复 2# snakkewang

thank you for reply, will try

[求助] Design Compiler re-synthesized the module

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