用VCS做synopsys提供的systemVerilog 实验仿真遇到的问题

klw02

以下是log 文件
Parsing design file './test.sv'
Parsing included file 'test_collection.sv'.
Parsing included file 'router_env.sv'.
Parsing included file 'input_agent.sv'.
Parsing included file 'packet_sequence.sv'.
Parsing included file 'packet.sv'.
Back to file 'packet_sequence.sv'.
Back to file 'input_agent.sv'.
Parsing included file 'driver.sv'.
Back to file 'input_agent.sv'.
Back to file 'router_env.sv'.
Back to file 'test_collection.sv'.
Parsing included file 'packet_da_3.sv'.
Back to file 'test_collection.sv'.
Back to file './test.sv'.
Top Level Modules:
       uvm_custom_install_recording
       test
TimeScale is 1 ns / 100 ps
Starting vcs inline pass...
5 unique modules to generate
recompiling package vcs_paramclassrepository
recompiling package uvm_pkg
recompiling package _vcs_msglog
recompiling module uvm_custom_install_recording
recompiling module test
All of 5 modules done
make[1]: Entering directory `/nfs/xa/proj/cp/xg766fe.work/kailongw/ces_uvm-1.1_2011.12/solutions/lab2/csrc' \

rm -f _csrc*.so pre_vcsobj_*.so share_vcsobj_*.so
if [ -x ../simv ]; then chmod -x ../simv; fi
g++  -o ../simv   -Wl,-rpath-link=./ -Wl,-rpath='$ORIGIN'/simv.daidir/ -Wl,-rpath=./simv.daidir/ \
-Wl,-rpath='$ORIGIN'/simv.daidir//scsim.db.dir  -m32 -m32 -rdynamic  uvm_dpi.o   \
objs/amcQw_d.o   _26009_archive_1.so  SIM_l.o      rmapats_mop.o rmapats.o rmar.o \
rmar_llvm_0_1.o rmar_llvm_0_0.o          /p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libzerosoft_rt_stubs.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libvirsim.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/liberrorinf.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libsnpsmalloc.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libvfs.so    \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libvcsnew.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libsimprofile.so \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libuclinative.so \
-Wl,-whole-archive /p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/libvcsucli.so \
-Wl,-no-whole-archive       ./../simv.daidir/vc_hdrs.o    /p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/vcs_save_restore_new.o \
/p/inway/tools/synopsys/vcsmx/L-2016.06-SP2-8-T-20170830/suse32/lib/ctype-stubs_32.a \
-ldl  -lc -lm -lpthread -ldl
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: skipping \
incompatible /usr/lib64/gcc/x86_64-suse-linux/4.3/libstdc++.so when searching for \
-lstdc++
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: skipping \
incompatible /usr/lib64/gcc/x86_64-suse-linux/4.3/libstdc++.a when searching for \
-lstdc++
/usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: cannot \
find -lstdc++
collect2: ld returned 1 exit status
make[1]: *** [product_timestamp] Error 1
make[1]: Leaving directory `/nfs/xa/proj/cp/xg766fe.work/kailongw/ces_uvm-1.1_2011.12/solutions/lab2/csrc' \

Make exited with status 2
CPU time: 10.769 seconds to compile + .284 seconds to elab + .308 seconds to link

nativeda

没安装32位的libstdc？ 你用vcs -full64 试试？ 不过用suse的还真不常见

klw02

回复 2# nativeda


   谢啦， 用 -full64 可以

rcliu1973

thank you

xiaoyisimonguo

回复 2# nativeda


   thank you for replying, my vcs runvcs -Mupdate counter_4bit.v tb_counter_4bit.v -debug_all -full64 &

ran completed:
../simv up to date
CPU time: 1.564 seconds to compile + .065 seconds to elab + .399 seconds to link

[1]    Done                          vcs -Mupdate counter_4bit.v tb_counter_4bit.v -debug_all -full64


But the following got dumping:
Command line: ./simv

--- Stack trace follows:

Dumping VCS Annotated Stack:
#0  0x00007fd5a92d2827 in waitpid () from /lib64/libc.so.6
#1  0x00007fd5a923e827 in do_system () from /lib64/libc.so.6


please help

reptilian99

Interesting

arthur_wo

LZ，请问这个实验里所需要的一些sv文件是从哪里获取的 ?
谢谢