AMS（奥地利微电子） 北京招验证岗位

王府井

AMS验证岗位，UVM和ARM SOC方向，有兴趣发简历到邮箱：158090058@qq.com

Job Responsibilities:

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Developblock level and top level verification environment.

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Developfirmware for top level test case.

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Executingblock and top simulation, give effective debug activate for platform or RTLbugs.

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Developscripts to make verification automatically.

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Designand write verification plan, test features, test case plan and reportdocuments.

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Havea good Cooperate with other teams with simulation support.

Requirements:

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Morethan 3 years’ experience of SOC verification with Master degree

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Proventrack record for successful verification of IC products in the past, at leastone successful tape-out experience.

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Masterat UVM verification methodology.

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Goodknowledge of Verilog and system Verilog language.

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Skilledin developing block level and top level verification platform.

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Familiarwith ARM SOC design and verification architecture.

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Familiarwith script language, such as perl and python.

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GoodKnowledge of C and firmware develop is a plus.

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Haveexperience at BLE and digital-analog module verification is a plus.