Formal+STA 能否代替 Post-Sim

Marvin.Liang

应该不行吧

CL7788

Thanks~

epssll

thanks good thanks

maoqiu

不能代替

peacerocket

good share

kka

i think formality  is use for check RTL and netlist   function is the same.
STA is check design timing is OK

after the APR it will have extra CTS and cell timing in the gate. the timing is real for gate.

sometime. the gate simaulation is different with the RTL

saipolo

可以，但是不是绝对，我们后仿就只跑一个用例。但是要你们后端给力，设计给力，而且是全部自己开发的ip，如果是买的ip，没吃透的话，还是建议多跑几个。

navylin1

完全不可以,恰恰相反,后仿的目的就是检查你的timing对不对,最后会反馈到你的constraint,如果你consttain错了,是她

smh

thankns

masaka_xlw

Formal/STA 正确的前提是约束能100%且正确覆盖chip，显然是不可能的。