COPYRIGHT 漏 1992-2006 CADENCE DESIGN SYSTEMS INC. ALL RIGHTS RESERVED.
漏 1992-2006 UNIX SYSTEMS Laboratories INC.,
Reproduced with permission.
This Cadence Design Systems program and online documentation are
proprietary/confidential information and may be disclosed/used only
as authorized in a license agreement controlling such use and disclosure.
RESTRICTED RIGHTS NOTICE (SHORT FORM)
Use/reproduction/disclosure is subject to restriction
set forth at FAR 1252.227-19 or its equivalent.
Program: @(#)$CDS: virtuoso.exe version 6.1.0 10/10/2006 14:09 (cds126047) $
Sub version: sub-version IC6.1.0.243 (32-bit addresses)
Loading geView.cxt
Loading LVS.cxt
Loading layerProc.cxt
Loading xlUI.cxt
Loading auCore.cxt
Loading schView.cxt
Loading selectSv.cxt
Loading vhdl.cxt
Loading seismic.cxt
Loading ams.cxt
END OF SITE CUSTOMIZATION
Loading schematic.cxt
Loading lo.cxt
Loading adexl.cxt
Loading oasis.cxt
Loading asimenv.cxt
Loading analog.cxt
Loading socket.cxt
Loading alvs.cxt
Loading simui.cxt
Loading hspiceD.cxt
Loading spectreinl.cxt
Loading spectrei.cxt
Loading UltraSim.cxt
Loading AMS.cxt
Loading awv.cxt
INFO (ADE-1010): There are no variables in the cellview.
Loading devCheck.cxt
Loading treeAssistant.cxt
Loading oi.cxt
Loading see.cxt
Loading ci.cxt
Extracting "inv schematic"
Schematic check completed with no errors.
"mylib inv schematic" saved.
Delete psf data in /home/tjj/simulation/inv/spectre/schematic/psf.
generate netlist...
Loading seCore.cxt
Begin Incremental Netlisting Jun 19 13:22:29 2007
End netlisting Jun 19 13:22:29 2007
Netlisting Statistics:
Number of components: 4
Elapsed time: 0.0s
Errors: 0 Warnings: 0
...successful.
compose simulator input file...
...successful.
start simulator if needed...
...successful.
Problems encountered during simulation.
Use the Simulation->Output Log menu for more information.