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北京比特大陆科技有限公司(Bitmain)是一家由集成电路技术团队、风险投资专家、企业家和资深互联网团队组成的高速成长中的高科技公司,总部位于北京,员工200余人。并在成都设有研发中心。在深圳、天津、福州、宁夏设有分公司,在北美设有代表处。公司同时具有软硬件和互联网相结合的研发能力,专注于全球领先水平高速运算芯片的研究,公司在比特币芯片行业已经做到全球第一,目前正全力进军人工智能超算芯片这个领域,现在需要招聘专业人才,招聘信息如下,职位地点:北京/武汉/成都/深圳。site可以自行选择,2年以上工作经验即可,有兴趣者可以加微信v578041381,或者直接发送简历到 hao.lv@bitmain.com 。
—— IC类 ——
▌资深芯片设计工程师 Senior IC/ASIC/SOC Design Expert
Responsibilities:
IC Block design for all frontend phase
IC chip level design for all font-end phase
Architecture define
RTL implementation
Analysis and Optimization for performance
Analysis and Optimization for power
Analysis and Optimization for timing
Design flow: lint/synthesis/sta/formal check
Silicon debugging
Requirements:
BS / MS with 5+ years of experience in ASIC or FPGA design
Experience with CPU related IPs design are highly desirable
Experience as design lead for complex or high speed IPs
Experience with all phases of frontend architecture, design and validation
RTL Coding, Design Reviews, SYN, CDC, FEV, DFT insertion, ATPG analysis
Demonstrated work experience with timing Analysis, Area and Power optimizations, Performance Analysis, Debug ability and Security analysis, ECOs, and Post-Silicon Debug
Excellent knowledge of Verilog and popular EDA simulation & implementation tools
Good experience in scripting languages like Perl, Unix shell or similar languages
▌资深全定制芯片设计工程师 Senior Full Custom IC Design Expert
Responsibilities:
Architecture design for custom chip
Function block front end design for custom chip
Full chip design for custom ASIC
Requirements:
BS / MS with 5+ years of experience in IC design
Solid theory understanding for digital and analog circuitry
Experience with circuit level customization, for example: SRAM / Adders / Mux etc
Experience with non-standard-cell based IC design is a plus
Experience with library characterization is a plus
Excellent knowledge of Verilog and popular EDA simulation & implementation tools
Good experience in scripting languages like Perl, Unix shell or similar languages
▌资深FPGA设计工程师 Senior FPGA Design Engineer
Responsibilities:
FPGA prototype implementation for complicated SOC system
Setup FPGA simulation env for fuction verification
FPGA Board bring up and debug
Requirements:
Master degree or above, 5+ years or more working experience
Strong Verilog RTL coding, and testbench design skills; Good understanding of digital circuits
Good Understanding of synthesis, simulation, P&R flow, timing analysis and relevant tools for FPGA and ASIC
Familiar with design tools of Xilinx, Altera
Familiar with SOC system design
Rich board debug experience
▌资深芯片验证工程师 Senior IC Verification Engineer
Responsibilities:
Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's
Create verification environment for both directed and random verification
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers and post-silicon teams
Requirements:
BS / MS with 5+ years of experience in design verification
Experience in design verification for CPU related IPs are highly desirable
Experience as verification lead for complex IP
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Simvision)
Expertise in Verilog
Excellent communication skills and ability to lead highly competent team.
Experience in SystemVerilog or similar HVL is highly desirable
Strong debugging and problem solving skills
Scripting knowledge (Perl/shell)
Strong fundamentals in computer architecture desirable
C++ programming language experience desirable
▌资深芯片后端设计工程师 Senior ASIC Backend DesignEngineer
Responsibilities:
Execute the whole Physical Design flow includeFloorplan/Placement/CTS/Routing/Physical Verification
Work with front end design Engineers to achieve timingclosure for both partition level and full chip level
IO ring design
Cross talk Analysis
IR Drop and Power Integrity Analysis
Execute ECO's
Develop and enhance entire physical design flow at bothchip and block level
Requirements:
BS/MS in Electrical or Computer Engineering with 5+ yearsexperience in physical design
Experience with advanced process, experience with hierarchicaldesign flow
Hands-on experience in full-chip/sub-chip Static TimingAnalysis. CPU related timing convergence background would be a plus
Hands on experience in logic synthesis and equivalencechecking/FV required
Expertise in physical design and optimization e.g.placement, routing, cell sizing, buffering, logic restructuring, etc. toimprove timing and power required. Background in implementing them through ECOsrequired
Understanding of DFT logic and hands-on experience in designclosure taking into account DFT logic required. DFT timing closure for variousmodes e.g. scan shift and capture, transition faults, BIST, etc. would be aplus
Expertise in analyzing and converging crosstalk delay,noise glitch, and electrical/manufacturing rules in deep-sub micron processes
Understand process variation effect modeling andexperience in design convergence taking into account variations required
Experience in critical path planning and crafting.Experience in circuits, SPICE simulations, and/or transistor level STA would bea plus
Expertise and in-depth knowledge of industry standard EDAtools required
Proficiency in scripting languages, such as, Perl, Tcl,Make, etc. Experience in methodology and/or flow automation would be a plus
—— 软件类 ——
▌资深芯片嵌入式软件工程师 Senior Embedded Software Engineer
Responsibilities:
Design, implement, validateand debug through firmware, device drivers, framework software, and applicationsoftware
Make changes to Linux kerneland write kernel/user space drivers/applications as and when required
Bring up of x86 based serveras well as bare metal SoC system
Analyze and tune for optimalperformance and efficiency
Develop relevant tools orscripts
Participate in all phases ofa product development
Requirements:
MSCS/MSEE with 2+ years orBSCS/BSEE with 5 years of relevant experience
Excellent C/C++/Assemblydevelopment and debugging skills
Detailed and extensiveexperience with Linux kernel software is required
Strong understanding of CPUarchitecture, bus, PCIe, and peripheral interfaces
Experience in EmbeddedOS/RTOSes preferred
Experience with GPU or othercompute/data-intensive device driver development preferred
Passionate about solvingfundamental problems
Good team player
▌系统软件开发工程师 Senior System Software Engineer
Responsibilities:
Design, implement, validateand debug through firmware, device drivers, framework software, and applicationsoftware
Deliver and maintain SDKand APIs for the architecture design, integrate with platform and applicationsoftware
Understand and analyzehardware features, leading to recommendations for future architectures
Analyze performance andtune for optimal performance and efficiency
Develop relevant tools orscripts
Participate in all phases ofa product development
Requirements:
MSCS/MSEE with 2+ years ofrelevant experience or PhD preferred
Excellent C/C++/Pythondevelopment and debugging skills
Solid background inmathematics, algorithms and data structures
Experience working with oneof the following areas: CUDA, 3D graphics, OpenCL, DSP, Neon, SSE, AVX, FMA, orother parallel processing systems
Good understanding ofconcepts related to computer architecture and operating systems
Passionate about solvingfundamental problems
Experience in machinelearning is a plus
Good team player
▌资深计算机系统结构工程师 Senior Computer Architecture Engineer
Responsibilities:
MS or PHD Degree inrelevant discipline (CS, EE, Math)
Strong programming skillsin C or C++
Strong background incomputer architecture, parallel processing, signal processing and/or highperformance computing
Ways To Stand Out From The Crowd
Big plus wit deep learning,computer vision and HPC domain
Experience incharacterizing and modeling system-level performance or power, executingcomparison studies, and documenting and publishing results
▌高性能计算工程师
工作职责:
在可编程的专用芯片上(类似于google最近推出的TPU)上开发firmware,充分使用芯片上的硬件资源来完成机器学习任务
任职资格:
有针对高复杂度算法的优化经验(比如机器学习算法/图像处理算法/视频编解码算法/基带信号处理等领域)
以下两个背景中最少要有一项
使用过GPU或是汇编语言做软件优化
芯片设计背景
了解计算机体系结构的基本原理.对软硬件协同工作有一定认识
有深度学习背景者加分。
欢迎有芯片设计经验又愿意转行做软件的人
职位关键字:并行计算 /芯片 / 计算机体系结构 / GPU/ CUDA / OpenCL / 汇编优化 / SSE / NEON
—— 算法类 ——
▌深度学习研发工程师 Deep Learning Engineer
工作职责:
从事前沿人工智能技术研发
至少涉及以下一种职责,计算机视觉,自然语言处理,深度学习平台,语音识别的研发
任职资格:
熟练掌握C/C++,Python
有一定的深度学习基础,能熟练使用Caffe,Torch,TensorFlow等深度学习平台中的任意一个优先
在以下至少一个领域有深入的研究:大规模机器学习、自然语言处理、计算机视觉、图像处理,语音识别
有宽泛的技术视野和对人工智能的热情
在计算机视觉国际顶级会议或者期刊上发表论文、国际比赛获奖、及有相关专利者优先
▌计算机视觉研发工程师 Computer Vision Engineer
工作职责:
负责公司计算机视觉相关的技术、系统、产品的研发工作(人脸检测识别、图像分类标注、OCR、图像处理等)
负责公司计算机视觉方向技术难点攻关、前瞻研究以及初级工程师的指导
任职资格:
熟练掌握C/C++,Python
熟练掌握机器学习基本算法并有一定的实践经验
有一定的深度学习基础,能熟练使用Caffe,Torch,TensorFlow等深度学习平台中的任意一个优先
熟练掌握计算机视觉和图像处理基本算法并具有丰富的相关经验(人脸检测识别、图像分类标注、OCR等)
有宽泛的技术视野和对人工智能的热情
在计算机视觉国际顶级会议或者期刊上发表论文、国际比赛获奖、及有相关专利者优先
▌机器学习算法工程师 Machine Learning Engineer
Responsibilities:
Development andimplementation of DL/ML algorithms focusing on industrial applications, suchas, driver-less cars, robotics, internet of things, and industry 4.0
Strategy development forthe field of AI/DL/ML, support in strategic decision making with regard to ourvarious product lines
Development of large scaleDL/ML algorithms and parallel implementation strategies
Evaluation and comparisonof DL/ML algorithms for specific applications and related tasks, in particularwith regard to the performance, training, and suitability for embeddedapplications
Close communication withour hardware architecture experts
Requirements:
PhD in computer science,artificial intelligence, mathematics, physics, statistics
Expertise and practicalexperience in the following domains: Artificial Intelligence, Deep Learning,Machine Learning. Practical experience in CNN/NLP algorithm is a plus
Indepth practice in deeplearning methodologies on GPU/FPGA/ASIC, such as Caffe, ConvNet, Torch…etc.,mastering the tuning strategy for CNN/NLP's parameters
Technical proficiency inprogramming languages: R, C/C++, Python, Matlab, Java, JavaScript, familiaritywith Linux environment
Experience with big datatechnologies and HPC is a plus, such as Hadoop ecosystem
Excellent communicativeskills in read and written English, fluent spoken English
Strong communicationskills, ability to express oneself logically, strong sense of team spirit,proactive communication
—— 硬件类 ——
▌资深硬件工程师/硬件技术专家 Senior Hardware Engineer/Expert
Responsibilities:
Designing, simulating,prototyping, and testing of electrical systems
Parts selection andqualification
Transform vendor referencedesigns into custom solutions
Build schematic, boardfloor planning, pre-layout planning based on simulations
Provide guidance to CADdesigners (placement and routing) and review CAD work
Lead and participate informal design reviews
Author HW specifications,and publish bill of materials
Bring up and testprototypes
Develop and Implement testplans
Lab debug of HW problems
Requirements:
5+ years of experience indigital/analog electrical system design
Proficient in the completeflow of CAD design tools
Proficient in constraintdriven design methodologies
Proficient in usingoscilloscopes, high speed digital test equipment, logic analyzers, and functiongenerators
Experience with the use ofhigh performance processors and support FPGAs
Strong knowledge and applicationof high-speed design methodologies for Signal Integrity is a must
Experience with effectivePCB stack-up design is a must
Experience with high speedbuses include: PCIe QPI, Multi-gigabit Ethernet, Infiniband, DDR3/DDR4
FPGA design experience is aplus
Experience with digital oranalog simulation is a plus
Digital signal processing,real-time image processing, and camera module experience is a plus
Strong communication skills
—— 市场、文案类 ——
▌市场营销
工作职责:
负责AI产品线的市场营销策略制定
善于运用市场调查、数据分析、文案策划
全面协调整合市场、PR、网站、运营和产品各环节
任职资格:
有3年以上相关市场营销/品牌创意背景
心怀敬业之心与责任心,认同算丰科技正在做的事
具有良好的团队协作意识及谈判沟通能力
逻辑思维能力强,具有良好的方案策划能力
精通英文读写、能顺畅的进行口语交流
全职
加分项:
对品牌形象、定位于市场营销有深入理解
具有社交媒体/客户关系管理的经验
对新事物有敏锐的洞察力,善于学习和钻研新领域
▌资深文案
工作职责:
搜集整理行业、竞品信息,制作数据分析报告
策划并撰写深度稿件,准确反映公司品牌影响力和产品价值
其他线上线下活动的辅助文案及执行
负责公司内刊的撰写
任职资格:
具有三年以上互联网公司文案经验
对数据敏感,并能透过数据指导运营
有较强文字功底和理解能力,文笔流畅,文字转化力强
精通英文读写、能顺畅的进行口语交流
面试时提供文字作品
全职、兼职均可
加分项:
有社交媒体关系
曾任编辑、记者 |