sytemverilog非压缩数组初始化--存储器初始化

cy_00521

reg [15:0]mem[127:0]={128{16'h55AA}};请问下这个初始化有什么问题，应该怎么写，谢谢。
Warning-[ISALS] Incompatible structure/array literal
/mnt/hgfs/uvm_veri_0812/5956464uvm/uvm_evp02_tmp/bus_agent/bus_dut.sv, 54
  Assignment patterns for structures and arrays must be braces prefixed with
  an apostrophe [ '{ ].
  Source info: {128 {16'h55aa}}