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DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- work with design to do design synthesis/coding check/timing closure
- Work with RTL designer on DUT verification
- Work with RTL designer on testplan development to achieve high code coverage and functional coverage
- Build up simulation model
- Testcase development and debugging
PREFERRED EXPERIENCE:
- Bachelor with 5+ yeas and Master with 3+ in Electrical or Computer Engineering.
- Familiar with RTL coding and front-end design/synthesis/timing closure flow
- Familiar with Linux Environment (including shell scripting and linux gnu tools)
- Good at C/C++, Perl, Makefile, familiar with Ruby, SystemVerilog, SystemC is a plus
- Experience of display specific-interconnection protocols (DisplayPort, LVDS, VGA,HDCP, DVI, HDMI etc) is a plus.
- Good communication skills and fluent English.
- Strong responsibilities and team spirit.
如果有兴趣的工程师请将简历发送至tobias.gu@amd.com,谢谢。 |
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