1、ASSCC_2008_A Low-Noise Self-Calibrating Dynamic Comparator for High-Speed ADCs2、Design and Analysis of Novel Dynamic Latched Comparator with Reduced Kickback Noise for High-speed ADCs
3、HIGH-SPEED AND LOW-POWER DYNAMIC LATCH COMPARATOR
4、IEEE_2010_high resolution low power 0.6um CMOS 40MHz dynamic latch comparator
5、IEEE_2014_Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator
6、IEEE_2015_Design of efficient Double Tail Comparator for Low Power
7、ISSCC_2007_A Double-Tail Latch_Type Voltage Sense Amplifier with 18ps Setup+Hold Time
8、ISSCC_2008_A 1.9μW 4.4fJ Conversion-step 10b 1MSs Charge Redistribution ADC
9、ISSCC_2012_A 7-to-10b 0-to-4MSs Flexible SAR ADC with 6.5-to-16fJ conversion-step
10、JSSC_1993_A current controlled latch sense amplifier and a static power saving input buffer for low power architectures
11、JSSC_2011_A 26uW 8bit 10MSs Asynchronous SAR ADC for Low Energy Radios
12、JSSC_2015_A 0.003mm2 10b 240 MSs 0.7mW SAR ADC in 28nm CMOS Witth Digital Error Correction and Correlated-Reversed Switching
13、New Improved High Speed Low Power Double Tail Comparator Design for 2.5GHz Input Signal
14、Rourkela_2011_DESIGN OF A NOVEL HIGH SPEED DYNAMIC COMPARATOR WITH LOW POWER DISSIPATION FOR HIGH SPEED ADCs
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发表于 2016-8-3 18:40:06
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