|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
有没有current mode pwm veriloga model ?
一般
使用
sot236 flyback pwm
Fb
gate
cs
protectvdd
gnd
find OTHER PWM MODEL
// PWMswCM.va - current mode PWM switch CCM-DCM auto-togggling // //
***************************************
// Owner : Nicolas Cyr
// E-mail : nicolas.cyr@onsemi.com
// ***************************************
//
// Using Christophe Basso's model from his book "Switch-Mode Power //
Supplies" (McGraw-Hill, 2008); based on Dr. Vatch?Vorp廨ian //
initial concept developped in 1986 at Virginia Polytech Institute //
(in "Simplified Analysis of PWM Converters Using the Model of the //
PWM Switch", Transactions on Aerospace and Electronics Systems, //
vol. 26, no. 3, May 1990).
//
// ***************************************
// Revision history
//
// 2008 Jan 23 - Nico Cyr - creation
// 2009 August 25th - correction on the CS line reported by James
Kohout // //
*****************************************************************
// Modifications by RK, Feb 2012
// - added dependency on simulation type for Cs calculation via
initial_step // - Ri to internal Rii to limit>0 for div operations //
*****************************************************************
`include "constants.vams"
`include "disciplines.vams"
module PWMswCM(a, c, p, Verr, DC, Mode);
inout a; electrical a; // "active" terminal
inout c; electrical c; // "common" terminal
inout p; electrical p; // "passive" terminal
input Verr; electrical Verr; // "error voltage" input
output DC; electrical DC; // "duty cycle" input
output Mode; electrical Mode; // "mode of operation" output
// (1 for DCM, 0 for CCM)
parameter real L=75u from (0:inf); // inductance value
parameter real Fsw=100k from (0:inf); // switching frequency
parameter real Ri=1 from (-inf:inf); // sense resistor
parameter real Sa=0 from [0:inf); // slope of compensation ramp
parameter real DCmax=0.99 from (0:1); // duty cycle max clamp
parameter real DCmin=0.016 from (0Cmax); // duty cycle min clamp
real d_1, d1cl, d1clh, d_2, d2cl, d2clh, Cs, mode, Iverr, Imju, Ics,
Rii; integer simtype;
analog begin
@(initial_step("ac","stb")) begin
simtype = 0;
end
@(initial_step("tran","dc")) begin
simtype = 1;
end
@(initial_step) begin
Rii = Ri;
if( Ri<= 0.0) begin
Rii = 1.0e-6;
$strobe("\nRi NULL AND THEREFORE BOUNDED TO 1uOhm !!!");
end
end
// calculate and clamp duty cycle d2
// (which corresponds to OFF time in CCM, and to demagnetization time
in DCM)
d_2 = (2*L*Fsw*I(p,c) / ((V(DC)*V(a,c))+1u)) - V(DC);
d2clh = (d_2>= (1-V(DC))) ? (1-V(DC)) : d_2;
d2cl = (d2clh<= DCmin) ? DCmin : d2clh;
// calculate and clamp ON-time duty cycle d1
d_1 = d2cl*V(c,p) / (V(a,p)-V(c,p)+1u);
d1clh = (d_1>= DCmax) ? DCmax : d_1;
d1cl = (d1clh<= DCmin) ? DCmin : d1clh;
// evaluate mode of operation (1=DCM, 0=CCM)
mode = (d2cl<(1-d1cl)) ? 1 : 0;
// calculate capacitor for subharmonic oscilllations in AC simulation
(0 if DCM or Tran)
Cs = (mode==1 || simtype==1) ? 0 : 4 / (L*4*pow(`M_PI,2)*pow(Fsw,2));
// calculate contributors to Ic current
Iverr = V(Verr) / Rii;
Imju = Sa*d1cl/(Rii*Fsw) + V(c,p)*d2cl*( 1-((d1cl+d2cl)/2))/(L*Fsw);
Ics = Cs*ddt(V(c,p));
// assign values to currents and voltages
I(a,p)<+ I(p,c)*d1cl / (d1cl+d2cl+1u);
I(p,c)<+ Iverr - Imju - Ics;
// Assign values to outputs
V(DC)<+ d1cl;
V(Mode)<+ mode;
end
endmodule |
|