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Memory Layout@上海
北京
深圳
简历发 hr@hi-talent.com 1. PhysicalDesign for Memory Products: Full custom Layout for analog and digital circuits inHigh performance DRAMs. 2. Floorplanning signal- and bus planning according to predefined specifications. 3. Chipsize optimization. 4. Area-and parasitic optimized layout. 5. Assemblyof BLKs and top level hierarchies including routing. 6. Verificationof circuits (Design Rule Check, Layout versus Schematic, Electrical rulecheck). 7. Generationof fill structures according to technology requirements. 8. Opticalsimulations on technology driven circuits. 9. Investigationson Electro migration and IR drop. Requirements: 1. Bachelorin Microelectronics, Electronic Engineering, or related field. 2. Familiarwith CAD software. 3. Familiarwith semiconductor process and structures of devices. 4. Teamoriented, love to work in young, international and highly motivated teams. 5. Goodcommunication skills. 6. Highgrade of flexibility. 7. Highlymotivated and engaged. 8. Experiencein digital analog and or mixture signal IC is preferred. 9. Experiencein Flash,SRAM and DRAM design is preferred. 10. Experiencein backend design flow (APR) is preferred. 11. Englishlanguage skill in writing and speaking is a must.
Memory layout designer@上海
北京
深圳
简历发 hr@hi-talent.com 全定制版图设计者,根据各种模拟电路或者存储器电路进行版图设计,并通过各种物理验证和各种细节检查,然后制作报告书。 岗位要求: 大专及以上学历,集成电路或微电子或电子等相关专业; 熟悉集成电路设计流程,2年以上模拟或者存储器版图设计经验; 精通Linux 操作系统,熟悉cshell或者perk/awk语言等,精通其中一项语言者有加分; 能够熟练使用laker和virtuoso软件制作版图,能够熟练使用calibre或者hercules进行DRC,LVS等相关验证,精通tcl或者skill语言者有加分; 具备阅读各种英文设计资料的英语水平;
Best Regards Jane.Jin 金娟 Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd. 上海芯得企业管理咨询有限公司 上海芯相会企业管理咨询有限公司 Mob: 18502155252 E-Mail: Jane-Jin@hi-talent.com 微信: xinde_jane QQ: 1600548210 Weibo: http://weibo.com/u/1716864892 website:
www.hi-talent.cn
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