马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
Job Location: Beijing
Job Responsibilities: 1.
Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic. 2.
Perform verification on all DFT structures 3.
Generate DFT related timing constraints and work with PD team for timing closure 4.
Generate and verify DFT structural patterns and functional patterns 5.
Participate in ATE bring-up and debug the DFT patterns on ATE 6.
Design and implement other DFX (debug, characterization, yield etc) logics |
Job Requirements: | - BS in EE & CS. MS preferred. - MS +3 years, BS +5 years relative experience - Hands on working experience on ASIC DFT design and verification
- Familiar with entire ASIC design flow - Experience with micro processor design a big plus - Should have strong problem solving skills
- Good English hearing, speaking, reading and writing capabilities - Good communication skills |
有意者请将简历发送至tobias.gu@amd.com标题注明应聘职位 |