Table of Contents
Part I Introduction
i. What’s All of this PLL stuff? 5
ii. The Charge Pump PLL with a Passive Filter 7
iii. The PLL as Viewed from a System Level 9
Part II PLL Performance
Spurs
1. Reference Spurs and their Causes 13
Addresses the causes of reference spurs and what can be done about them.
2. Non-Reference Spurs and their Causes 25
Addresses different types of spurs, their causes, and their cures.
Phase Noise
3. Noise Sources in a PLL System 33
Discusses the causes of phase noise and how to roughly predict it.
4. RMS Phase Error and Signal to Noise Ratio 49
Discusses the meaning, calculation, and significance of RMS phase error.
Lock Time
5. Transient Response of PLL Frequency Synthesizers 55
Addresses in depth lock time issues and derives all relevant equations.
Other Topics
6. Discussions of the Phase/Frequency Detector for the Armchair 69
Philosopher
Discusses the how’s and why’s of the operation of the phase-frequency
detector.
Part III PLL Design
Methods for Passive Loop Filter Design
7. Fundamentals of Loop Filter Design 77
Gives design equations for PLL Loop Filter Design.
8. Equations for a Passive Second Order Loop Filter 81
Gives design equations for a second PLL Loop Filter Design.
9. Equations for a Passive Third Order Loop Filter 85
Gives design equations for third PLL Loop Filter Design.
10. Fourth and Higher Order Passive Loop Filter Designs 97
Gives design equations for fourth and higher order loop filter designs.
4 PLL Performance, Simulation, and Design Ó 2001, Second Edition
Active Filters for High Voltage Tuning for a VCO
11. Fundamentals of Active PLL Loop Filter Design 105
Discusses all sorts of active filters using the charge pump output pin
12. Design of an Active Loop Filter Using the Differential Phase Detector Outputs 115
Discusses a design using the differential phase detector outputs
Spur Reducing PLL Design Techniques
13. The Impact of Loop Filter Parameters and Filter Order on Reference Spurs 121
Discusses how to add an op-amp for an active filter using the Do pin.
14. Using the Fastlock Feature for PLL Design 127
Discusses using these pins with an op-amp to design an active filter.
Part IV Additional Topics
15. Lock Detect Circuit Construction and Analysis 133
Discusses how to build a more sensitive lock detect circuit and how it works.
16. Impedance Matching Issues and Techniques for PLLs 139
Discusses how to match the VCO output to the PLL input
17. Routh Stability for PLL Loop Filters 145
Discusses Routh’s Stability Criterion as it applies to PLL Loop Filter Design.
18. A Sample Loop Filter Analysis 149
Shows a sample loop filter analysis using a Mathcad Simulation tool
19. Basic Prescaler Operation 159
Describes the operation of the single, dual, and quadruple modulus prescaler.
20. Fundamentals of Fractional N PLLs 163
Discusses how fractional N PLLs work and when to use them.
21. Other PLL Design and Performance Issues 167
N value determination, peaking and phase margin, sensitivity, concluding remarks.
Part V Supplemental Information
22. Glossary and Abbreviation List 173
Lists various PLL terms and symbols used in this book with their definitions.
23. References 183
24. Useful Websites and Online RF Tools |