浦东某美资公司+ASIC Design Flow Engineer

chloe-zhang

1.产品：CMOS Sensor
地点：浦东ASIC Design Flow Engineer

Responsibilities:
- Responsible for the SOC chip's frontend design flow, including Synthesis, Formal and STA
- Setup timing Constraint, power constraint CPF/UPF and validate the design in standard tool flow
- Work with back-end Engineers to achieve timing closure
- Setup and development the Formal checking environment and debug

Requirements:
- BSEE required, MSEE preferred, with basic ASIC design knowledge.
- Familiarity in advanced low-power SoC design techniques
- 3+ years hands-on experience on STA/Synthesis/Formal check
- Knowledge on ARM, AHB/AXI bus and SoC architecture is a plus.
- Familiar with Programming in Perl/Csh, tcl and C/C++
- Strong and continuous learning capability, self-motivated and good communication skill

有意向请咨询：chloe-zhang@kthr.com；微信号：13916933764