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[招聘] [招聘]Marvell美满电子DSP Engineer招聘

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发表于 2016-4-11 14:17:31 | 显示全部楼层 |阅读模式

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职位一
Senior DSP Architect
Location: Shanghai
Description:
Responsible for wireless modem algorithms & architecture design and verification
o    LTE/WCDMA/WIFI/5G algorithm research, design and simulation
o    Architecture design and release implementation specification to ASIC and SW engineers.
o    Guide and co-operate with ASIC and SW engineers for implementation and verification.
  
Qualification:
o    Master degree above in EE
o    Solid theory foundation on wireless communication and digital signal processing
o    Be familiar with LTE/WCDMA/WIFI physical layer protocols and key technologies
o    Good knowledge on logic implementation and micro processor
o    2+years physical layer algorithm R&D experiences of LTE/WIFI/WCDMA system
o    Be good at Matlab and C coding.
o    Capability of learning, communication and co-operation.
  
  
职位二
DSP Engineer
Location: Shanghai
Description:
o    Will join in the WCDMA L1 and L1C development, to mature the current new WCDMA R8 design;
o    Will join in InterRAT design and development/debugging, which involved in WCDMA R8/GSM/LTE designs
o    Will handle some customers issues, which are relevant to his/her functions;
o    Working on WCDMA L1C functions/code developing
o    Stabilizing the system with the team, including unit function validation/system validation
o    Design the functions/modules with the relevant teams
o    Debugging the case/functions with the equipment
o    Analysis the logs to identify the reasons for the issues from the field and customers.
  
Qualification:
o    Master degree or above, and major in Electrical Engineering or relevant.
o    Good understanding in Digital Signal Processing and Wireless Communication
o    Have good C language skills and debug skills
o    Experience in DSP and Communication system development, and 2G/3G/4G is preferable.
o    Experience in the develop of the physical layer or L1 is a good plus
o    Have 2+ years of embedded system software development and debug
o    Good team work and communication
o    Fairly good English read, write and speak
发表于 2016-4-11 21:27:02 | 显示全部楼层
回复 1# Hwangbo

您好:

我是空军工程大学电子与通信工程专业一名硕士研究生(2016届应届毕业生),很高兴看到贵公司的招聘信息我这边主要是做通信系统或者说是做软件无线电接收机(GPS/北斗接收机基带信号处理),以及与其相关算法的设计、论证、FPGA实现等。包括调制解调、数字混频(DDC/DUC)、数字滤波、算法实现、以及一些简单的编解码,使用的开发平台是Xilinx ISE Design Suite 14.4(仿真工具:Modelsim10.1a,综合工具:Synplify Pro9.6)MATLAB做辅助开发设计和测试验证。但是目前我在turboLDPCFEC(前向纠错)方面仍无法取得突破。

(对于XilinxFPGA而言)在同一个系统中,VHDLVerilog可以进行混合编程,可以使用VHDL调用/例化Verilog,也可以使用Verilog调用/例化VHDL。因此VHDLVerilog对于FPGA设计实现来讲,是统一的。学习任何一门语言即可,只要学得好就行。我个人认为,VerilogVHDL相比,除了语法简单、代码短小外就没有什么优势了,而vhdl语法就比较严格了,代码显得有些冗长,但是ISE可以自动生成Verilog/VHDL模板,调用/例化非常简单。而且,XilinxFPGA已经嵌入DSP、MicroBlazePowerPCARM etc,直接在Xilinx ISE Design Suite 14.4或Vivado 2013.4上编写HDL代码即可以调用/使用DSP资源,以及使用其软/硬核处理器资源,进行FPGA/ASIC/SOC的设计实现。lovegiving。

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