招聘 芯原微电子成都招聘信息

sunny555

   芯原股份有限公司（芯原）是一家芯片设计平台即服务（Silicon Platform as aService，SiPaaSTM）提供商，为包含移动互联设备、数据中心、物联网（IOT）、可穿戴设备、智能家居和汽车电子等多种终端市场在内的各种广泛应用提供以IP为中心的、基于平台的芯片定制服务和一站式端到端的半导体设计服务。

   芯原成立于2001年，总部位于中国上海，目前在全球已有超过600名员工。芯原在中国、美国和芬兰共设有6个设计研发中心，并在全球共设有9个销售和客户支持办事处。

   如需了解更多信息，欢迎关注公司官网：http://www.verisilicon.com/

芯原微电子（成都）有限公司诚邀您的加入！！！

公司地址：天府软件园C区10栋23楼；

简历投递邮箱：yujuan.li@verisilicon.com

Senior/Staff Engineer of Physical Design

Responsibilities:

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Validate physical implementation of IPD products offering, includepower analysis, synthesis, floorplan, place-and-route, and timing closure.

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Support customers by helping to do synthesis, floorplan,place-and-route, timing and power analysis on customer’s specific targetlibrary.

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Develop and maintain internal physical implementation flow fromRTL to post-route, include libraries, lint, CDC, synthesis, place-and-route,CTS, power analysis, LEC.

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Deliver and keep up with physical package contents for customerson all IPD products.

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Working with RTL designers and library team to analyze and debugbottleneck or issues coming from customer and internal, include netliststructure, DFT, ECO, timing closure, floorplan, power, and congestion issues.

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Evaluate new EDA tools and methodology best-fitted for IPDproducts.

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Help junior engineers to solve technical issues.

Requirements:

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Bachelor degree or above with major in either EE, CE, CS.

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5+ years of work experience in IC digital implementation relatedareas.

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Good knowledge in some of the following physical design concepts:synthesis, floorplaning, place-and-route, timing closure, timing sign-off, DFT,power analysis, hierarchical flow and so on.

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Skilled in the field of IC digital implementation flow and majorEDA tools such as Design Compiler, ICC, EDI, Prime Time, Conformal, Redhawk,Spyglass, or equivalent.

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Skilled in scripting and building flow automation using Tcl, Perl,Python or equivalent.

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Fluent in both English and Chinese.

Computer Vision SW Engineer

JobDescription:

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We are looking for a motivated software engineer to createcomputer vision and machine learning solutions on our multi-core visionprocessor.  This engineer will work withSW and product development teams to build vision processing library and demoprototype for applications such as automotive, surveillance cameras, IoT, and drones.

Requirements:

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B.S./Master degree from Computer Science, Computer Engineering,Electrical Engineering, Math, or Physics

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Proficient in C and C++, and Matlab is a plus

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GPU programming experience is highly desired, or VLIW and SIMDprogramming is desired

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Basic knowledge of image processing, computer vision, neuralnetworks, and machine learning

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Familiarity with OpenCV

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Proficient in at least one scripting language and has basicunderstanding of processing large dataset

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Excited to work on embedded platforms or FPGA

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New graduated or experienced

Senior Design Engineer of USB

Responsibility:

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Plan the design of complex digital design blocks by fullyunderstanding the design specification and interacting with design teams

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Test the design after sample back

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Co-work with Analog team to pass the compliant test

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Disciplined issue reporting, bug tracking and communication ofdesign risks & status

Basic Qualifications:

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MS degree in Electrical Engineering or equivalent practicalexperience

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Experienced in the complicated design

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Master verilog

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Strong knowledge of design flow (such as Synthesis, LEC, STA, DFT,CDC, etc)

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Strong debug capability

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Strong communicator and team player

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Strong problem solver

Preferred Qualifications

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At least 3 years of design experience

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SERDES background(USB/SATA/PCIE)

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Tape-out experience

Project Leader of Video IP Design

Responsibilities:

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Play an leadership role in defining video IP spec and devisingVideo IP architecture

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Develop challenging modules including module spec definition,macro architecture design, RTL coding, C coding, simulation and synthesis

l
Carry out IP level verification or IP blocksintegration/implementation

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Be responsible for project progress control and design schedule  

l
Help engineers to solve technical issues

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Support customers regarding Video IP application

Requirements:

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Bachelor degree or above in EE

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7+ years of work experience in related areas

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Good knowledge of some of the following general IP: H.264, H.265,MPEG, JPEG, AVS, AVS+ decoder & encoder and so on

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Skilled in the field of digital circuit design, whole digitaldesign flow and EDA tools

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Skilled in some of the following disciplines: RTL coding, Ccoding, Catapult C coding, simulation, synthesis/DFT/STA. Knowledge aboutcatapult C design flow is a plus

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Leader at least one mature silicon proven video IP

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Fluent in both English and Chinese

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Good customer communication skill

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Self motivated, good communication skill and team work spirit

Senior/Staff Engineer of Video IP Design

Responsibilities:

l
Play an important role in defining video IP spec and devisingVideo IP architecture

l
Develop challenging modules including module spec definition,macro architecture design, RTL coding, C coding, simulation and synthesis

l
Carry out IP level verification or IP blocksintegration/implementation

l
Help junior engineers to solve technical issues

l
Support customers regarding Video IP application

Requirements:

l
Bachelor degree or above in EE

l
5+ years of work experience in related areas

l
Good knowledge of some of the following general IP: H.264, H.265,MPEG, JPEG, AVS, AVS+ decoder & encoder and so on

l
Skilled in the field of digital circuit design, whole digitaldesign flow and EDA tools

l
Skilled in some of the following disciplines: RTL coding, Ccoding, Catapult C coding, simulation, synthesis/DFT/STA. Knowledge aboutcatapult C design flow is a plus

l
Key member in at least one mature silicon proven video IP

l
Fluent in both English and Chinese

l
Self motivated, good communication skill and team work spirit

Senior Design Verification Engineer

Responsibility:

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Plan the verification of complex digital design blocks by fullyunderstanding the design specification and interacting with design teams toidentify important verification scenarios

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Create constrained-random verification environment using python,verilog (or system verilog)

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Develop functional/performance test cases

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Identify and write all types of coverage measures for stimulus andcorner-cases

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Debug tests to deliver functional correct blocks

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Disciplined issue reporting, bug tracking and communication ofdesign risks & status

Basic Qualifications:

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MS degree in Electrical Engineering or equivalent practicalexperience

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Experience in the verification of designs such as GPUs, cpus,networking or peripheral controllers

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Experienced with the full verification cycle

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Strong knowledge of system Verilog and C++

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Experience with scripting language(Python, Perl preferred)

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Strong communicator and team player

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Strong problem solver

PreferredQualifications :

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At least 2 years of design experience on complicated blocks

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Experience with profiling, performance or power simulation

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Familiar with FPGA flow and comfortable with lab debugging

Compiler Software Engineer

JobDescription:

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We are seeking motivated and talented compiler software engineersto enable the advanced GPU features, and optimize GPU performance for graphics,compute, and vision applications. As a member of compiler software team whichdevelops core shader compiler modules for OpenGL, OpenCL, and OpenVX drivers,you will be involved in designing and implementing the core compiler technologiesthat maximize  GPU performance, and willalso have direct access to the cutting-edge GPU hardware architecture which isnot only capable of 3D graphics rendering but also capable of high performancegeneral computing. An ideal candidate for this position must have a passion forsolving challenging software problems involving compiler technologies. Anyprior compiler development experience on CPU/GPU/ISP platforms would beconsidered particularly valuable for this position.

Requirements:

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Experience with compiler development in academia or industryenvironment

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Knowledge of modern compiler technologies, includingintermediate-language representation, platform dependent/independentoptimizations, functional transformation, code generation, etc.

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Knowledge of compiler-related data structures and algorithms suchas graph algorithms, analysis and optimization algorithms

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Familiarity with graphics shading languages, LLVM and GPUarchitectures a definite plus

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2ys+ experience of working with a large code base with C/C++,assembly programming language

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MS or PhD in Computer Science or Computer Engineering

IT Engineer

Major JobResponsibilities:

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负责本地网络及其设备的维护、管理、故障排除等日常工作，确保公司网络正常运作；

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给本地办公室员工提供IT支持服务；

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安装和维护公司服务器系统软件和应用软件；

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协调IT供应商做好有关的IT服务；

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配合远程办公室的IT同事做好本地IT项目；

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确保IT资源的有效运用，满足公司业务。

Requirements:

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本科以上学历，计算机相关专业优先；

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3年以上网络系统与IT系统维护工作经验；

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熟悉WINDOWS服务器系统与LIUNX系统，熟悉各类网络设备，可以独立安装、调试及故障排除；

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工作积极主动，具备耐心且有责任心，具备团队合作精神。

快快加入”芯“家吧，we are family !!!

sunny555

回复 1# sunny555


   人呢？

787782240

持续多久

hongkong2

怎么约了电话面试，就没消息了？ 这是什么行为？

chineselboy

回复 1# sunny555


    约了面试怎么没有消息了？

sunny555

回复 5# chineselboy


   你好，请问你的名字是？我这边立即去处理，不好意思，给你造成困扰！

sunny555

回复 4# hongkong2


   你好，麻烦告知一下你的名字，我这边立即处理，对你造成的不便，我深表抱歉！

sunny555

回复 3# 787782240


   你好，目前还在招聘中，回复不及时，不好意思！

hongkong2

回复 7# sunny555


    已经发到邮箱了， yujuan.li@verisilicon.com， 请查收一下，谢谢

hongkong2

回复 7# sunny555


    已回复邮箱：yujuan.li@verisilicon.com
    邮件名叫：message from eetop
    请查收，回复邮件，谢谢