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Position Description:
1) Providing direct technical support to customers in presale stage to persuade customers to adopt Cadence AMS/Serdes or any analog PHY (MIPI DPHY/MPHY) solutions for their applications
2) Interface with customer architects and AMS/Serdes/MIPI PHYs IP business unit to enable evaluation of application specific IP performance and features per customer’s SOC requirements.
3) Working with the sales team to manage the IP activities in the region to achieve a high customer satisfaction rate and for building strong customer relationships
4) Providing customer feedback on new/existing requirements for AMS/Serdes/MIPI PHYs IP usage from customers to the R&D business unit.
5) Providing direct technical customer support and assistance to enable customers to successfully integrate/use AMS/Serdes/MIPI PHY IP in their SOC.
6) Writing application notes and review protocol specifications for AMS/Serdes/MIPI PHY IP. Knowledge of digital controllers is a plus (MIPI controllers such as digiRF, UFS)
Position Requirements:
1) Experience in AMS/Serdes/MIPI D/MPHY design and architecture development.
2) Experience with SOC architecture and high speed protocols.
3) Exposure to IP-based SOC design flow and real tape-out experience.
4) Good written and verbal communication skills and problem solving skills are required.
5) Ability to conduct technical meetings, presentations, seminars and training to customers and to the sales team
6) Travel within AP region may be required.
7) Good understanding of the semiconductor IP marketplace and ecosystem is a plus.
关键词:Serdes, MIPI, DYHY/MPHY
简历请发送至HR邮箱:cecilyl@cadence.com
工作地点: 深圳福田区深南大道,7888号 |
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