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对象:应届生或毕业一年以内的
Responsibilities:
1. Design and implementation of complex FPGAs and/or ASICs.
2. Participate in the architecture definition, implementation and verification phases.
3. Detailed design specification and test plan development.
4. Develop and implement block level RTL, perform synthesis and achieve timing closure.
5. Develop testbench and write testcases
6. Work with cross-functional teams (hardware, software, diagnostics and signal integrity group).
7. Assist in complex subsystem level lab bring-up, integration, and unit test verification.
Requirements:
Recent graduate or on your final year of studies towards a Bachelor’s or Master’s Degree degree in Electrical Engineering, Computer Engineering, Micro-electronics
• Ability to manage multiple tasks and work towards long-term goals
• Solid understanding of Engineering fundamentals and technical problem-solving skills
• Experience in establishing and sustaining excellent relationships with the extended team
• Excellent verbal and written skills
CRDC Core ASIC Group(CAG).
CRDC Cisco ASIC team have delivered 5 ASICs for high end Catalyst 6k switch and Nexus 7K switch with 65nm,45nm,32nm and 14nm technology node from system design, ASIC architecture, implementation to chip bring up. CRDC CAG are now working on Cisco next generation IP base chip development and help Cisco to win more than 5 Billion Dollar revenue every year.There are more than 30 employees who work on ASIC front end design and verification, back-end design and DFT. We are hoping you to join us Now.
Location:
Cao He Jing, Xuhui District, Shanghai, China
Contact:
Michael Ruan (email: zruan@cisco.com)
Please send you resume to Michael (zruan@cisco.com) with the subject of “ASIC +School+Major”. We will contact you as soon as possible.
简历投递截止日期:2015年11月1日 |
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