Rabaey 的数字IC第二版 的一道习题

No12

Consider a CMOS inverter followed by a wire of length L. Assume that in the
reference design, inverter and wire contribute equally to the total propagation delay tpref. You
may assume that the transistors are velocity-saturated. The wire is scaled in line with the ideal
wire scaling model. Assume initially that the wire is a local wirea. Determine the new (total) propagation delay as a a function of t
pref, assuming that technology and supply voltage scale with a factor 2. Consider only first-order effects.
b. Perform the same analysis, assuming now that the wire scales a global wire, and the wire
length scales inversely proportional to the technology


啥叫reference design？
什么是ideal wire scaling model?, local wire 和 global wire 又指的是什么？
大神在何方......

No12

好吧我会了，没人理我~~