QUALIFICATION:
- 3 years or above Experience in RF/analog (PLL)design with MS or PhD in electric and electronic engineering;
- Understanding receiver architectures for multi-standard TV products and other wireless systems;
- Hands-on experiences in design of IC blocks to chip top levels in deep submicron CMOS technologies;
- Proficient with simulation tools (Spectre/SpectreRF) and oversight of layout design;
- Demonstrated ability for characterization of block and chip performances in lab and ATE environments;
- Strong communication skills and also excellence as team player.