大侠,我将RTL里面的小写改成了大写,还是报warning
Presto compilation completed successfully.
Information: Building the design 'DW02_MULT_3_STAGE' instantiated from design 'dsp_0000' with
the parameters "16,16". (HDL-193)
Warning: Cannot find the design 'DW02_MULT_3_STAGE' in the library 'WORK'. (LBR-1)
Warning: Design 'Mon' has '4' unresolved references. For more detailed information, use the "link" command. (UID-341)
Current design is 'Mon'.
我发现个问题, 就是它只在 library 'WORK'里找DW02_MULT_3_STAGE,但是我用report_desgin_lib中,
DEFAULT (/home/soc_test/desktop/dc/work)
WORK (/home/soc_test/desktop/dc/work)
architecture : m Mon(verilog)
architecture : m dsp_0000(verilog)
architecture : m dsp_0001(verilog)
architecture : m dsp_fffe(verilog)
architecture : m dsp_ffff(verilog)
DW01 (/home/soc_test/ss/dw/dw01/lib)
DW02 (/home/soc_test/ss/dw/dw01/lib)
entity : p n DW02_BOOTH
architecture : mn d DW02_BOOTH(STR)
package : n DW02_COMPONENTS
entity : p n DW02_MAC
architecture : mn DW02_MAC(VERIF)
entity : p n DW02_MULT
architecture : mn d DW02_MULT(CSA)
architecture : n DW02_MULT(VERIF)
entity : p n DW02_MULTP
architecture : n d DW02_MULTP(NBW)
architecture : mn d DW02_MULTP(WALL)
entity : p n DW02_MULT_2_STAGE
architecture : mn d DW02_MULT_2_STAGE(STR)
entity : p n DW02_MULT_3_STAGE
architecture : mn d DW02_MULT_3_STAGE(STR)
entity : p n DW02_MULT_4_STAGE
architecture : mn d DW02_MULT_4_STAGE(STR)
从上面报告中可以看出,DW02_MULT_3_STAGE是在DW02中,而不在WORK中,所以会报那个warning,但是不知道怎么解决啊。