【NVIDIA社招】ASIC Verification Engineer（验证工程师）

NVHR

Hello All,

大家好，这边是NVIDIA HR Tracy, 我们目前在上海招聘ASIC Verification Engineer（验证工程师）的岗位.

职位描述如下，如有意向：
欢迎发送简历到 tracyw@nvidia.com     QQ：1751315121
收到简历之后，我将同您联系；

Company Description：
http://www.nvidia.cn/object/about-nvidia-cn.html
在二十年的时间里，NVIDIA 一直在视觉计算方面 (计算机图形的艺术与科学) 勇当先锋。 凭借我们发明的 GPU ——现代视觉计算的引擎，这一领域现已扩张到涵盖了视频游戏、电影制作、产品设计、医学诊断以及科学研究等等。 现在，视觉计算正变得越来越重要，它影响着人们与科技之间的互动方式。

ASIC Verification Engineer
Responsibilities:
The verification engineer is expected to cover testbench setup, familiar with verif flow and tracking strategy.

Minimum Requirement:
- BS/MS in electrical/computer engineering and related.
- 3+ years MS or 5+ years BS
- Excellent perl/C++ skills
- Complex TB setup experience.
- Fully experienced verification flow, including testplan, test, coverage model, testbench, BFM modeling.
- Good understanding in Verilog and project tree infrastructure.
- Makefile is big plus
- Fluent English (both written and spoken) and excellent communication skills
- Demonstrated ability to work independently as well as in a multi-disciplinary group environment


if you show interest, pls reply the resume , any other question feel free to let me know, thanks very much for your time!


Best Regards

Tracy

QQ: 1751315121

Mail:  tracyw@nvidia.com