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公司中天联科,具体可在网上查。 公司机顶盒业务部门需要IC 验证人员,内部工作氛围不错。想回成都的可以投简历给我 wsguestc126@126.com
Responsibility: l
Developverification plan according to the Chip/IP specification
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SetupUVM verification environment l
CreateConstrain Random test pattern and direct test pattern to verify DUT
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DevelopUVM Interface VIPs l
Createfunctional coverage by assertion or coverage groups l
Workclosely with RTL designer to assist in simulation debug/code coverage analysis
Qualification: l
Master/Bachelordegree on EE or related with 3+ year experience in verification ,2+ yearexperience on UVM
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Familiarwith Perl/Python, shell programming l
Basicknowledge of IC design, IC production flow
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Experiencein display system or DDR is a plus l
Experiencein chip/SOC level verification is a plus l
Excellentinterpersonal and communication skills, good teamwork adaptability, goodwritten English skills, self-motivated. |