新手FPGA进行Burst传输掉点求大神指点

jlc

新手撸一块sparten6 XC6SLX45的板子，4路AD采集数据存FIFO后进行Burst传输存到DDR中发现掉点Xil_Out8(XPAR_M_ADCP_ALGORITHM_0_BASEADDR+OFFSET+Con_Reg_Addr,0x0A);//write 0x0A to the control register to perform write operation.
Xil_Out32(XPAR_M_ADCP_ALGORITHM_0_BASEADDR+OFFSET+Addr_Reg_Addr, AD_original_DATA_ADDR_ch1+data_save1);//write the target address to the address register
Xil_Out16(XPAR_M_ADCP_ALGORITHM_0_BASEADDR+OFFSET+BE_Reg_Addr,0xffff);//all bytes are enabled
Xil_Out16(XPAR_M_ADCP_ALGORITHM_0_BASEADDR+OFFSET+Leng_Reg_Addr, 400);//burst write bytes 800*4bytes
Xil_Out8(XPAR_M_ADCP_ALGORITHM_0_BASEADDR+OFFSET+Go_Reg_Addr,0x0A);//write go register to start a transfer
data_save1 += 400;
for(i = 0; i <25; i ++);
用以上程序传4路数据存DDR 发现后面两路存在掉点，就是DDR少数地址没有被覆盖。困扰了好久没找到原因，求大神指点一二，感激不尽

jlc

有没有也遇到这种掉点的情况的，求助