Cadence招聘资深模拟设计工程师

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Cadence招聘资深模拟设计工程师

Title: Principal/LeadAnalog Design Engineer

Location： SH

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Position Description:

Analog IC designer -responsible for the design and development of analog/mixed signal IC circuitblocks from initial concept/specification through final verification ofconformance to IP specifications. Focus area of design will be in DDR IO in lowgeometry CMOS processes.  May alsosupport Cadence SerDes/AFE IP development by owning the design circuit buildingblocks with support from the design team. Background should demonstrate good problem solving skills, excellentanalog aptitude, good communication skills, and ability to work cooperatively ina team environment.

  

Position Requirements:

1.MSEE - minimum 6 years relevant experience

2.Must have design experience for some basic analog functioncircuit blocks including: drivers, plls, op-amps, comparators, voltage andcurrent references, phase-locked loops. Must be proficient in using CAD toolsfor circuit analog simulation, analysis, and verification in CMOS processes.