vivado 2014.1调用 modelsim 10.1a仿真问题

squirrel_216 · 发表于 2015-1-12 00:20:20

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在vivado 2014.1调用 modelsim 10.1a时，报出以下错误，请各位高手指教。

# Model Technology ModelSim SE vcom 10.1a Compiler 2012.02 Feb 22 2012
# -- Loading package STANDARD
# ** Error: e:/FPGA_program/project_1/project_1.srcs/sources_1/ip/char_fifo/fifo_generator_v12_0/hdl/builtin/builtin_prim.vhd(46)): in protected region.
# ** Error: e:/FPGA_program/project_1/project_1.srcs/sources_1/ip/char_fifo/fifo_generator_v12_0/hdl/builtin/builtin_prim.vhd(46)): in protected region.
# ** Error: e:/FPGA_program/project_1/project_1.srcs/sources_1/ip/char_fifo/fifo_generator_v12_0/hdl/builtin/builtin_prim.vhd(46)): in protected region.
# ** Error: C:/modeltech_10.1a/win32/vcom failed.
# Error in macro E:\FPGA_program\project_1\project_1.sim\sim_1\behav\tb_wave_gen.do line 59
# C:/modeltech_10.1a/win32/vcom failed.
# while executing
# "vcom -work fifo_generator_v12_0 -93 "e:/FPGA_program/project_1/project_1.srcs/sources_1/ip/char_fifo/fifo_generator_v12_0/hdl/builtin/builtin_prim.vh..."