By using the Setup > Cross-section form you can define how the
board stackup will be built. The board must have at least one internal plane that is defined ! u. Y2 W: y# {: v1 e
as ‘Shielded’. This is necessary for simulating correctly in Allegro SI. Inside the Allegro * B6 ], A R( O
SI tool is a calculator tool that helps the engineer decide the width of the trace to route to 1 ]' D- ]+ z" y0 U, u( ?
achieve the required impedance。
标注为屏蔽层,就是用来计算阻抗的(参考平面)。