Table of Contents
Preface
Editor
Contributors
Integration of Graphics Processing Cores with Microprocessors; Deepak C. Sekar and Chinnakrishnan Ballapuram
Arithmetic Implemented with Semiconductor Quantum-Dot Cellular Automata; Earl E. Swartzlander Jr., Heumpil Cho, Inwook Kong, and Seong-Wan Kim
Novel Capacitor-Less A2RAM Memory Cells for Beyond 22-nm Nodes; Noel Rodríguez and Francisco Gamiz
Four-State Hybrid Spintronics–Straintronics: Extremely Low-Power Information Processing with Multiferroic Nanomagnets Possessing Biaxial Anisotropy; Noel D’Souza, Jayasimha Atulasimha, and Supriyo Bandyopadhyay
Improvement and Applications of Large-Area Flexible Electronics with Organic Transistors; Koichi Ishida, Hiroshi Fuketa, Tsuyoshi Sekitani, Makoto Takamiya, Hiroshi Toshiyoshi, Takao Someya, and Takayasu Sakurai
Soft-Error Mitigation Approaches for High-Performance Processor Memories; Lawrence T. Clark
Design Space Exploration of Wavelength-Routed Optical Networks-on-Chip Topologies for 3D Stacked Multi- and Many-Core Processors; Luca Ramini and Davide Bertozzi
Quest for Energy Efficiency in Digital Signal Processing: Architectures, Algorithms, and Systems; Ramakrishnan Venkatasubramanian
Nanoelectromechanical Relays: An Energy Efficient Alternative in Logic Design; Ramakrishnan Venkatasubramanian and Poras T. Balsara
High-Performance and Customizable Bioinformatic and Biomedical Very-Large-Scale-Integration Architectures; Yao Xin, Benben Liu, Ray C.C. Cheung, and Chao Wang
Basics, Applications, and Design of Reversible Circuits; Robert Wille
Three-Dimensional Spintronics; Dorothée Petit, Rhodri Mansell, Amalio Fernández-Pacheco, JiHyun Lee, and Russell P. Cowburn
Soft-Error-Aware Power Optimization Using Dynamic Threshold; Selahattin Sayil
Future of Asynchronous Logic; Scott C. Smith and Jia Di
Memristor-CMOS-Hybrid Synaptic Devices Exhibiting Spike-Timing-Dependent Plasticity; Tetsuya Asai
Very-Large-Scale Integration Implementations of Cryptographic Algorithms; Tony Thomas
Dynamic Intrinsic Chip ID for Hardware Security; Toshiaki Kirihata and Sami Rosenblatt
Ultra-Low-Power Audio Communication System for Full Implantable Cochlear Implant Application; Yannick Vaiarello and Jonathan Laudanski
Heterogeneous Memory Design; Chengen Yang, Zihan Xu, Chaitali Chakrabarti, and Yu Cao
Soft Error Resilient Circuit Design; Chia-Hsiang Chen, Phil Knag, and Zhengya Zhang
Index |