【Marvell招聘】ASIC DFT design Engineer

Hwangbo

Job Title: ASIC DFTdesign Engineer

Location: Shanghai/Beijing

Job Description:

-Block, IP and SoC level DFTimplementation (JTAG, Scan, Mbist and analog/IP test etc.) and RTL integration;

-Participate in test spec/plandefinition; create the DFT design document and signoff DFT reviewchecklists;

-Test patterns/vectors generation andverification;

-Interface to backend team on physicaldesign and timing closure;

-Interface to test engineers on ATE andvectors bring-up and debugging;

-Chip DFT quality sign-off

-DFT STA, constraint generation, formaland timing closure

Qualifications:

- DFT design andintegration experience

- Hands on DFTimplementation experience (Bscan, Mbist, DC/AC Scan, analog IP test circuit integration,IDDQ test, ATPG and test pattern verification)

- Expertise with DFTtools from Synopsy, Mentor, Syntest etc.

- Strong logic designand verification background

- Experience inSynthesis and STA will be plus

- Proficient in Perl,tcl and shell programming

- BSEE degree or above

- Good team workspirit

If you are interested in the position, please send your resume to the following email address:   jiangrr@marvell.com

Subject of your email should be: School_Name_Applied position_Information source
Eg.SJTU_Zhang Peng _Data Analyst_BBS