2014 IEEE ADC相关paper

xautxaut

目录如下，与大家共享
[1]Design and Evaluation of a Low-Cost High-Performance Σ–Δ ADC for Embedded Control Systems in Induction Heating Appliances
[2]A 15-MHz Bandwidth 1-0 MASH Σ–Δ ADC With Nonlinear Memory Error Calibration Achieving 85-dBc SFDR
[3]Design Techniques to Improve Blocker Tolerance of Continuous-Time Σ–ΔADCs
[4]An  Oversampled 12/14b SAR ADC with Noise Reduction and Linearity Enhancements Achieving up to 79.1dB SNDR
[5]A 5mW CT ΔΣ ADC with Embedded 2nd-Order Active Filter and VGA Achieving 82dB DR in 2MHz BW
[6]A Filtering ΔΣ ADC for LTE and Beyond
[7]Double-sampled wideband delta–sigma ADCs with shifted loop delays
[8]A0.039mm Inverter-Based 1.82mW68.6 dB-SNDR 10 MHz-BW CTΣ–ΔADC in 65 nm CMOS Using Power- and Area-Efficient Design Techniques
[9]Development of Self-Calibrating A/D Converters
[10]Power and Bandwidth Scalable 10-b 30-MS/s SAR ADC
[11]AReconfigurable Σ–ΔADC With Up to 100 MHz Bandwidth Using Flash Reference Shuffling
[12]Quantization noise shaping for information maximizing ADCS
[13]An Adaptive Low-Power Receiver Architecture for IEEE 802.15.4 Standard
[14]ISCAS  2014 Table of Contents
[15]Limit Cycle Counting Based Smart Background Calibration of Continuous Time Sigma Delta ADCs
[16]A Time-domain Based Multi-bit ADC for Application in Delta-Sigma Modulators
[17]Improved offline calibration for DAC mismatch in low OSR Σ∆ ADCs with distributed feedback
[18]A Low-Power Parasitic-Insensitive Switched-Capacitor Integrator for Delta-Sigma ADCs  
[19]A 1.2V low-power high-resolution noise-shaping ADC using multistage time encoding converters for Biomedical Applications
[20]A Low Power Second Order Current Mode Continuous Time Sigma Delta ADC with 98 dB SNDR
[21]Calibrated Switched Capacitor Integrators based on Current Conveyors and its application to Delta Sigma ADC
[22]Noise-Shaped Residue-Discharging Delta-Sigma ADCs With Time-Modulated Pulse Feedback
[23]A Low-Power Second-Order Double-Sampling Delta-Sigma Modulator for Audio Applications
[24]A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS
[25]Time Difference Amplifiers to improve the Dynamic Range of MASH Time Encoded ADCs
[26]Bootstrapping Techniques for Floating Switches in Switched-Capacitor Circuits
[27]A Noise-Coupled Low-Distortion Delta-Sigma ADC with Shifted Loop Delays
[28]High-Speed Low-Power Decimation Filter for Wideband Delta-Sigma ADC  
[29]Blocker Tolerant Wideband Continuous Time Sigma-Delta Modulator for Wireless Applications
[30]Nauta OTA in a Second-Order Continuous-Time Delta-Sigma Modulator
[31]A Low-Power 10MHz Bandwidth Continuous-Time ΣΔ ADC with Gm-C Filter
[32]High Order Dynamic Element Matching for Multi-bit Delta Sigma A/D & D/A Converters
[33]Emerging Analog-to-Digital Converters
[34]A 28 nm Analog and Audio Mixed-Signal Front End for 4G/LTE Cellular System-on-Chip
[35]Advances in High-Speed Continuous-Time Delta-Sigma Modulators
[36]Low-Power DT ΣΔModulators Using SC Passive Filters in 65 nm CMOS
IEEE_2014.part6.rar (4.43 MB, 下载次数: 170 )

2014-12-4 22:04 上传

点击文件名下载附件

lipinshengxp

??????????????

dandeng

撒意识！搞一个目录，出处也没有！！

Accee

什么情况？附件呢？链接呢？

残桥挂月

版主是比较关注ΣΔADC还是今年这种结构的ADC确实挺火

huangkai

服务大众，值得支持啊，顶

xautxaut

很抱歉第一次发帖居然上传附件没成功，现在发帖都要审核，我自己又没注意查看，给大家带来不便了啊

qmax

tks tks

zengyl

thx for sharing

ralphtw

2014 IEEE ADC