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发表于 2014-10-3 06:18:31
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RGMII is just GMII with multiplexed signals
to send TX_EN or TX_ER,
the TX_CTL is active at same time as TXD
this allows sending of TX_EN, TX_ER
control encoding is
CTL(rising/falling), DV, ER, D(4 bits rising, 4 bits falling edge clock)
0/0,0,0, xxxY -> Y=link status
0/0,0,0 xYYx -> RXC clock speed 00=2.5,01=25,10=125,11=rsvd
0/0,0,0 Yxxx, where Y=0->HDX, Y=1 -> FDX
0/1,0,1 FF -> carrier sense
1/0,1,1 00-FF -> data error
1/1,1,0 00-FF -> normal data
or you can take a look at xilinx ip doc
pg160-gmii-to-rgmii.pdf (page 30 or so)
I think there is an RGMII spec floating around here if not then find a PHY or MAC vendor |
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