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[Video Lecture] CMOS Device Scaling - Past, Present, and Future
presented by Yuan Taur of the University of California, San Diego, USA.
Yuan Taur received the B.S. degree in physics from National Taiwan University, Taipei, Taiwan, in 1967 and the Ph.D. degree in physics from University of California, Berkeley, in 1974. From 1981 to 2001, he was with the Silicon Technology Department of IBM Thomas J. Watson Research Center, Yorktown Heights, New York, where he was Manager of Exploratory Devices and Processes. Areas in which he has worked and published include latchup-free 1-um CMOS, self-aligned TiSi2, 0.5-um CMOS and BiCMOS, shallow trench isolation, 0.25-um CMOS with n+/p+ poly gates, SOI, low-temperature CMOS, and 0.1-um CMOS. Since October 2001, he has been a professor in the Department of Electrical and Computer Engineering, University of California, San Diego. Dr. Yuan Taur was elected a Fellow of the IEEE in 1998. He has served as Editor-in-Chief of the IEEE Electron Device Letters from 1999 to 2011. He authored or co-authored over 200 technical papers and holds 14 U.S. patents. He co-authored a book, "Fundamentals of Modern VLSI Devices," published by Cambridge University Press in 1998. The 2nd edition was published in 2009. Dr. Yuan Taur received IEEE Electron Devices Society's J. J. Ebers Award in 2012 "for contributions to the advancement of several generations of CMOS process technologies." Video Lecture recording+ presentation
CMOS Device Scaling Lecture Presentation.part03.rar
(14 MB, 下载次数: 202 )
CMOS Device Scaling Lecture Presentation.part04.rar
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CMOS Device Scaling Lecture Presentation.part05.rar
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CMOS Device Scaling Lecture Presentation.part06.rar
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CMOS Device Scaling Lecture Presentation.part07.rar
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CMOS Device Scaling Lecture Presentation.part08.rar
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CMOS Device Scaling Lecture Presentation.part09.rar
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CMOS Device Scaling Lecture Presentation.part10.rar
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CMOS Device Scaling Lecture Presentation.part11.rar
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发表于 2014-9-30 13:01:02
